main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ap2104btcer: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers ap2104btcer: viewers · Ray 1mo ago
ap2104btcer-etched.fit.json ap2104btcer: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ap2104btcer-etched.glb ap2104btcer: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ap2104btcer-etched.step ap2104btcer: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ap2104btcer.glb Publish 0.1.0 · Ray 1mo ago
ap2104btcer.kicad_mod Publish 0.1.0 · Ray 1mo ago
ap2104btcer.kicad_sym Publish 0.1.0 · Ray 1mo ago
ap2104btcer.lbr Publish 0.1.0 · Ray 1mo ago
ap2104btcer.step Publish 0.1.0 · Ray 1mo ago
package.json ap2104btcer: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json ap2104btcer: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md Initial commit: component/ap2104btcer · Ray 1mo ago

AP2104BTCER

Wuxi Chipown Micro electronics · Charge Pumps · SOT-23-6L

AP2104BTCER from Wuxi Chipown Micro electronics, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT output Output voltage requiring at least 2.2µF low ESR ceramic capacitor placed close to pin for best performance.
2 GND power_in Power ground connection.
3 EN input Low voltage shutdown input with approximately 0.8V threshold; pin must not float and requires valid logic level drive.
4 C- passive Bootstrap capacitor negative terminal requiring low ESR ceramic capacitor minimum 2.2µF; do not use polarized aluminum or tantalum capacitors.
5 VIN power_in Input power supply voltage (2.7V to 5.5V) requiring at least 2.2µF low ESR ceramic capacitor placed close to pin for best performance.
6 C+ passive Bootstrap capacitor positive terminal requiring low ESR ceramic capacitor minimum 2.2µF; do not use polarized aluminum or tantalum capacitors.

Key specifications

Parameter Value
Manufacturer Wuxi Chipown Micro electronics
Package SOT-23-6L
Category Power Management (PMIC)
Pins 6

CAD (KiCad official)

  • Symbol: AP2104BTCER
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6L (KiCad packages3D, STEP)
  • 3D model files: ap2104btcer-etched.step / ap2104btcer-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2104btcer.step / ap2104btcer.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi Chipown Micro electronics datasheet (7 pp, sha256 287474aaa7cefcdd, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF