main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 20d ago
viewers ap2012s: viewers · Ray 20d ago
ap2012s-etched.glb ap2012s: factory component page (tier=lcsc) · Ray 20d ago
ap2012s-etched.step ap2012s: factory component page (tier=lcsc) · Ray 20d ago
ap2012s-hero.glb ap2012s: hero GLB from the etched model (keeps the MPN mark) · Ray 20d ago
ap2012s-hero.overlay.json Publish 0.1.0 · Ray 20d ago
ap2012s.glb Publish 0.1.0 · Ray 20d ago
ap2012s.kicad_mod Publish 0.1.0 · Ray 20d ago
ap2012s.kicad_sym Publish 0.1.0 · Ray 20d ago
ap2012s.lbr Publish 0.1.0 · Ray 20d ago
ap2012s.step Publish 0.1.0 · Ray 20d ago
package.json Publish 0.1.0 · Ray 20d ago
page.json Set visibility: public · Ray 20d ago
README.md Publish 0.1.0 · Ray 20d ago

AP2012S

ALLPOWER ShenZhen Quan Li Semiconductor · MOSFETs · SOP-8

AP2012S from ALLPOWER ShenZhen Quan Li Semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the N-channel MOSFET (one of three source pins, labelled S on the package photo).
2 S passive Source of the N-channel MOSFET (one of three source pins, labelled S on the package photo).
3 S passive Source of the N-channel MOSFET (one of three source pins, labelled S on the package photo).
4 G input Gate of the N-channel MOSFET; VGS is rated ±10 V with a threshold of 0.3 V min, 0.8 V typ and 1.1 V max.
5 D passive Drain of the N-channel MOSFET (one of four drain pins); VDS is rated 18 V and ID is 12 A at 25°C.
6 D passive Drain of the N-channel MOSFET (one of four drain pins); VDS is rated 18 V and ID is 12 A at 25°C.
7 D passive Drain of the N-channel MOSFET (one of four drain pins); VDS is rated 18 V and ID is 12 A at 25°C.
8 D passive Drain of the N-channel MOSFET (one of four drain pins); VDS is rated 18 V and ID is 12 A at 25°C.

Key specifications

Parameter Value
Manufacturer ALLPOWER ShenZhen Quan Li Semiconductor
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: AP2012S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ap2012s-etched.step / ap2012s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2012s.step / ap2012s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ALLPOWER ShenZhen Quan Li Semiconductor datasheet (6 pp, sha256 5f7b2af369dccb94, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF