component
AP1539SDPG-13
Public Made by Adomby adom
Diodes Incorporated DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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AP1539SDPG-13
Diodes Incorporated · DC-DC Converters · SOIC-8-EP
AP1539SDPG-13 from Diodes Incorporated, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback pin; the feedback voltage is specified at 0.784V to 0.816V (0.8V typ.) and the feedback pin voltage is rated VSS - 0.3 to VCC. |
| 2 | EN | input | Power-off pin: high gives normal step-down operation and low deactivates all circuits; the EN input must be at least 2.0V high and at most 0.8V low, with the EN pin voltage rated VSS - 0.3 to VCC. |
| 3 | OCSET | passive | Connect an external resistor from VCC to this pin to set the maximum output current; the OCSET pin bias current is 75 to 105 µA. |
| 4 | VCC | power_in | IC power supply pin; the VCC pin voltage is rated VSS - 0.3 to VSS + 20V and the input voltage is 3.6V to 18V. |
| 5 | Output | output | Switch pin for connecting the external inductor and diode, with the switch pin voltage rated VSS - 0.3 to VCC; minimize trace area here to reduce EMI. |
| 6 | Output | output | Second switch pin, internally tied to pin 5, for connecting the external inductor and diode, with the switch pin voltage rated VSS - 0.3 to VCC. |
| 7 | VSS | power_in | GND pin; the dual VSS pins 7 and 8 are internally connected to the die pad and the absolute maximum VCC is referenced to VSS. |
| 8 | VSS | power_in | GND pin; the dual VSS pins 7 and 8 are internally connected to the die pad and the absolute maximum VCC is referenced to VSS. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback Voltage | VFB | 0.784 | 0.8 | 0.816 | V | IOUT = 0.1A | 4 |
| Feedback Bias Current | IFB | 0.1 | 0.5 | µA | IOUT = 0.1A | 4 | |
| Line Regulation | ∆VOUT/VIN | 1 | 2 | % | VIN = 5V~18V | 4 | |
| Load Regulation | ∆VOUT/VOUT | 0.2 | 0.5 | % | IOUT = 0.1 to 4A | 4 | |
| Oscillation Frequency | fOSC | 240 | 300 | 400 | KHz | Measure waveform at SW pin | 4 |
| EN Pin Input Voltage High | VIH | 2 | V | Evaluate oscillation at SW pin | 4 | ||
| EN Pin Input Voltage Low | VIL | 0.8 | V | Evaluate oscillation stop at SW pin | 4 | ||
| OCSET Pin Bias Current | IOCSET | 75 | 90 | 105 | µA | 4 | |
| Thermal shutdown threshold | TSHDN | 150 | °C | 4 | |||
| Thermal shutdown hysteresis | THYS | 55 | °C | 4 | |||
| Input Voltage | VIN | 3.6 | 18 | V | Note 5 | 3 | |
| Output Current | IOUT | 0 | 4 | A | 3 | ||
| Operating Ambient Temperature | TA | -20 | 85 | °C | 3 | ||
| Operating Junction Temperature Range | TJ | -40 | 125 | °C | 3 | ||
| Storage Temperature Range | TST | -65 | 150 | °C | 3 | ||
| ESD HBM Human Body Model ESD Protection | ESD HBM | 5.5 | KV | 3 | |||
| ESD MM Machine Model ESD Protection | ESD MM | 200 | V | 3 | |||
| Thermal Resistance Junction-to-Case | θJC | 26 | C/W | SOP-8L-DEP (Note 6) | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | If you need low TC & TJ or large PD (Power Dissipation), The dual SW pins(5& 6) and VSS pins(7& 8)on the SOP-8L package are internally connected to die pad, The evaluation board should be allowed for | 8 |
CAD (KiCad official)
- Symbol:
AP1539SDPG-13 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
ap1539sdpg-13-etched.step/ap1539sdpg-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap1539sdpg-13.step/ap1539sdpg-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (12 pp, sha256
93616d6f6303c7e7, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).