component

AP1534SG-13

Public Made by Adom

by adom

Diodes Incorporated DC-DC Converters, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ap1534sg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
ap1534sg-13-etched.fit.json ap1534sg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ap1534sg-13-etched.glb ap1534sg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ap1534sg-13-etched.step ap1534sg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ap1534sg-13.glb Publish 0.1.0 · Ray
ap1534sg-13.kicad_mod Publish 0.1.0 · Ray
ap1534sg-13.kicad_sym Publish 0.1.0 · Ray
ap1534sg-13.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
ap1534sg-13.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json ap1534sg-13: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md ap1534sg-13: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

AP1534SG-13

Diodes Incorporated · DC-DC Converters · SOP-8

AP1534SG-13 from Diodes Incorporated, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FB input Feedback pin. Connect to an external resistor divider from VOUT; internal error amplifier regulates this node to VFB = 0.8V (typ, 0.784-0.816V). VOUT = VFB x (1 + RA/RB), with RB in the 0.7k-5kΩ range.
2 EN input Enable / power-off pin. Logic High (VIH >= 2.0V) enables normal step-down operation; Logic Low (VIL <= 0.8V) stops step-down operation and deactivates all internal circuits. Input leakage typ +20 / -10 uA.
3 OCSET input Over-current setpoint. Add an external resistor to VCC to set the maximum output current threshold. OCSET pin bias current typ 90 uA (75-105 uA).
4 VCC power_in IC power supply pin. Input voltage range 3.6V to 18V (absolute max VSS-0.3 to VSS+20V). Bypass locally with a ceramic capacitor (e.g. 0.1 uF) close to the pin.
5 Output output Switch node output (drain of internal P-channel power MOSFET). Connect the external inductor and freewheeling Schottky diode here. Pins 5 and 6 are internally tied; minimize trace/copper area to reduce EMI.
6 Output output Switch node output (drain of internal P-channel power MOSFET). Connect the external inductor and freewheeling Schottky diode here. Pins 5 and 6 are internally tied; minimize trace/copper area to reduce EMI.
7 VSS power_in Ground return pin. Pins 7 and 8 are internally tied and must both be connected to the PCB ground plane for proper current return and thermal dissipation.
8 VSS power_in Ground return pin. Pins 7 and 8 are internally tied and must both be connected to the PCB ground plane for proper current return and thermal dissipation.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOP-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • AP1534SG-13

CAD (KiCad official)

  • Symbol: AP1534SG-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ap1534sg-13-etched.step / ap1534sg-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap1534sg-13.step / ap1534sg-13.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ap1534sg-13.step 122 KB You want the bare part, or you mark your own boards.
ap1534sg-13-etched.step 2.3 MB You want the part with AP1534SG-13 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 561 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (11 pp, sha256 81e2089489abd7a2, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF