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ap1509-33sg-13-jsm

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JSMSEMI DC-DC Converters, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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docs ap1509-33sg-13-jsm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers ap1509-33sg-13-jsm: viewers · Ray
ap1509-33sg-13-jsm-etched.fit.json ap1509-33sg-13-jsm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ap1509-33sg-13-jsm-etched.glb ap1509-33sg-13-jsm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ap1509-33sg-13-jsm-etched.step ap1509-33sg-13-jsm: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ap1509-33sg-13-jsm.glb Publish 0.1.0 · Ray
ap1509-33sg-13-jsm.kicad_mod Publish 0.1.0 · Ray
ap1509-33sg-13-jsm.kicad_sym Publish 0.1.0 · Ray
ap1509-33sg-13-jsm.lbr Publish 0.1.0 · Ray
ap1509-33sg-13-jsm.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json ap1509-33sg-13-jsm: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md ap1509-33sg-13-jsm: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

AP1509-33SG-13-JSM

JSMSEMI · DC-DC Converters · SOP-8

AP1509-33SG-13-JSM from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Positive input supply for the IC switching regulator. Absolute maximum 40 V; operating range 4.75 V to 40 V for the 3.3 V version. Requires an input bypass capacitor to minimize voltage transients and supply the switching currents.
2 Output output Power switching output from the internal 3A switch. Voltage at this pin switches between (+VIN − VSAT) and approximately −0.5 V, with a duty cycle approximately VOUT/VIN. PCB copper area on this pin should be minimized to reduce coupling to sensitive circuitry.
3 FB input Output voltage feedback control. Senses the regulated output voltage to complete the feedback loop. Internal reference is 1.235 V; feedback bias current is typically 50 nA (100 nA max).
4 EN input ON/OFF shutdown control input. Pulling this pin below ~1.3 V (VIL ≤ 0.6 V) turns the regulator ON; pulling it above ~1.3 V (VIH ≥ 2.0 V) shuts the regulator down, dropping supply current to ~150 µA (standby ~50 µA typ). Tie to GND if the shutdown feature is not needed.
5 GND power_in Circuit ground. All four GND pins (5, 6, 7, 8) are tied together to the die paddle for heat dissipation and must be connected to the ground plane.
6 GND power_in Circuit ground. All four GND pins (5, 6, 7, 8) are tied together to the die paddle for heat dissipation and must be connected to the ground plane.
7 GND power_in Circuit ground. All four GND pins (5, 6, 7, 8) are tied together to the die paddle for heat dissipation and must be connected to the ground plane.
8 GND power_in Circuit ground. All four GND pins (5, 6, 7, 8) are tied together to the die paddle for heat dissipation and must be connected to the ground plane.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOP-8
Category PMIC
Pins 8

Ordering variants

  • AP1509-33SG-13-JSM

CAD (KiCad official)

  • Symbol: AP1509-33SG-13-JSM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ap1509-33sg-13-jsm-etched.step / ap1509-33sg-13-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap1509-33sg-13-jsm.step / ap1509-33sg-13-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (None pp, sha256 f72b8cf572cb82e0, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF