component
AP12N10S
Public Made by Adomby adom
ALLPOWER ShenZhen Quan Li Semiconductor MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 25d ago |
| viewers | 25d ago |
| ap12n10s-etched.glb | 25d ago |
| ap12n10s-etched.step | 25d ago |
| ap12n10s-hero.glb | 25d ago |
| ap12n10s-hero.overlay.json | 25d ago |
| ap12n10s.glb | 25d ago |
| ap12n10s.kicad_mod | 25d ago |
| ap12n10s.kicad_sym | 25d ago |
| ap12n10s.lbr | 25d ago |
| ap12n10s.step | 25d ago |
| package.json | 25d ago |
| page.json | 25d ago |
| README.md | 25d ago |
AP12N10S
ALLPOWER ShenZhen Quan Li Semiconductor · MOSFETs · SOP-8
AP12N10S from ALLPOWER ShenZhen Quan Li Semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the N-channel MOSFET (pins 1-3 are source). |
| 2 | S | passive | Source of the N-channel MOSFET (pins 1-3 are source). |
| 3 | S | passive | Source of the N-channel MOSFET (pins 1-3 are source). |
| 4 | G | input | Gate of the N-channel MOSFET; VGS rated ±20 V, threshold 1.2 to 2.5 V at 250 µA. |
| 5 | D | passive | Drain of the N-channel MOSFET (pins 5-8 are drain); VDS rated 100 V, ID 12 A continuous. |
| 6 | D | passive | Drain of the N-channel MOSFET (pins 5-8 are drain); VDS rated 100 V, ID 12 A continuous. |
| 7 | D | passive | Drain of the N-channel MOSFET (pins 5-8 are drain); VDS rated 100 V, ID 12 A continuous. |
| 8 | D | passive | Drain of the N-channel MOSFET (pins 5-8 are drain); VDS rated 100 V, ID 12 A continuous. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ALLPOWER ShenZhen Quan Li Semiconductor |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
AP12N10S - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ap12n10s-etched.step/ap12n10s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap12n10s.step/ap12n10s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ALLPOWER ShenZhen Quan Li Semiconductor datasheet (6 pp, sha256
87b76acd0c3d8a76, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).