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AOD3N80-VB

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VBsemi Elec MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AOD3N80-VB

VBsemi Elec · MOSFETs · TO-252

AOD3N80-VB from VBsemi Elec, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; controls the channel with a gate-source threshold of 2.0 to 4.0 V and an absolute maximum VGS of ±30 V.
2 D passive Drain, connected to the tab; the drain-source voltage is rated at 800 V and the continuous drain current is 2.8 A at TC = 25 °C.
3 S passive Source; the continuous source-drain body diode current is 2.8 A.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package TO-252
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS 800 V 1
Gate-source voltage VGS -30 30 V Printed as ± 30 V 1
Continuous drain current ID 2.8 A TJ = 150 °C, TC = 25 °C, VGS at 10 V 1
Continuous drain current ID 1.8 A TJ = 150 °C, TC = 100 °C, VGS at 10 V 1
Pulsed drain current IDM 5 A Repetitive rating; pulse width limited by maximum junction temperature 1
Linear derating factor 0.5 W/°C 1
Single pulse avalanche energy EAS 14 mJ VDD = 140 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 Ω, IAS = 0.9 A 1
Maximum power dissipation PD 62.5 W 1
Operating junction and storage temperature range TJ, Tstg -55 150 °C 1
Drain-source voltage slope dV/dt 70 V/ns TJ = 125 °C 1
Reverse diode dV/dt dV/dt 0.13 ISD ≤ ID, dI/dt = 100 A/μs, starting TJ = 25 °C 1
Soldering recommendations (peak temperature) 300 °C For 10 s, 1.6 mm from case 1
Maximum junction-to-ambient thermal resistance RthJA 62 °C/W 2
Maximum junction-to-case (drain) thermal resistance RthJC 2 °C/W 2
Drain-source breakdown voltage VDS 800 V VGS = 0 V, ID = 250 μA 2
Gate-source threshold voltage (N) VGS(th) 2 4 V VDS = VGS, ID = 250 μA 2
Gate-source leakage IGSS -100 100 nA VGS = ± 20 V 2
Gate-source leakage IGSS -1 1 μA VGS = ± 30 V 2
Zero gate voltage drain current IDSS 1 μA VDS = 800 V, VGS = 0 V 2
Zero gate voltage drain current IDSS 10 μA VDS = 640 V, VGS = 0 V, TJ = 125 °C 2
Total gate charge Qg 9.8 19.6 nC VGS = 10 V, ID = 1.0 A, VDS = 480 V 2
Turn-on delay time td(on) 11 ns VDD = 480 V, ID = 1.0 A, VGS = 10 V, Rg = 9.1 Ω 2
Rise time tr 7 14 ns VDD = 480 V, ID = 1.0 A, VGS = 10 V, Rg = 9.1 Ω 2
Turn-off delay time td(off) 19 38 ns VDD = 480 V, ID = 1.0 A, VGS = 10 V, Rg = 9.1 Ω 2
Fall time tf 27 54 ns VDD = 480 V, ID = 1.0 A, VGS = 10 V, Rg = 9.1 Ω 2
Gate input resistance Rg 1.8 3.6 7.2 Ω f = 1 MHz, open drain 2
Continuous source-drain diode current IS 2.8 A 2
Pulsed diode forward current ISM -5 A 2
Diode forward voltage VSD 1.2 V TJ = 25 °C, IS = 11 A, VGS = 0 V 2
Reverse recovery charge Qrr 0.9 1.8 μC TJ = 25 °C, IF = IS = 1.0 A, dI/dt = 100 A/μs, VR = 25 V 2
Reverse recovery time trr 278 ns TJ = 25 °C, IF = IS = 1.0 A, dI/dt = 100 A/μs, VR = 25 V 2

CAD (KiCad official)

  • Symbol: AOD3N80-VB
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: aod3n80-vb-etched.step / aod3n80-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aod3n80-vb.step / aod3n80-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (7 pp, sha256 ba9399ec0e875d10, retrieved 2026-10-28, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF