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Contents

README

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AO6604

UMW · MOSFETs · SOT-23-6

AO6604 from UMW, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G1 input Gate terminal of one MOSFET in the dual N- and P-channel pair; gate-source voltage is rated ±8 V maximum.
2 S2 passive Source terminal of the second MOSFET in the pair; the datasheet gives no separate pin limit beyond the device absolute maximum ratings.
3 G2 input Gate terminal of the second MOSFET in the pair; gate-source voltage is rated ±8 V maximum.
4 D2 passive Drain terminal of the second MOSFET in the pair; the N-channel drain-source voltage is rated 20 V and the P-channel -20 V.
5 S1 passive Source terminal of the first MOSFET in the pair; the datasheet gives no separate pin limit beyond the device absolute maximum ratings.
6 D1 passive Drain terminal of the first MOSFET in the pair; the N-channel drain-source voltage is rated 20 V and the P-channel -20 V.

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-23-6
Category Transistors/Thyristors
Pins 6

CAD (KiCad official)

  • Symbol: AO6604
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: ao6604-etched.step / ao6604-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ao6604.step / ao6604.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (15 pp, sha256 50cceaa670ec111d, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF