component
AO4840
Public Made by Adomby adom
UMW MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
AO4840
UMW · MOSFETs · SOP-8
AO4840 from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S2 | passive | Source terminal of N-channel MOSFET 2; device VDS is 40 V and gate-source voltage is limited to ±20 V. |
| 2 | G2 | input | Gate terminal of N-channel MOSFET 2; gate-source voltage is rated ±20 V (VGS). |
| 3 | S1 | passive | Source terminal of N-channel MOSFET 1; device VDS is 40 V and gate-source voltage is limited to ±20 V. |
| 4 | G1 | input | Gate terminal of N-channel MOSFET 1; gate-source voltage is rated ±20 V (VGS). |
| 5 | D1 | passive | Drain terminal of N-channel MOSFET 1 (pins 5 and 6 are internally the same drain); drain-source voltage is rated 40 V. |
| 6 | D1 | passive | Drain terminal of N-channel MOSFET 1 (same net as pin 5); drain-source voltage is rated 40 V. |
| 7 | D2 | passive | Drain terminal of N-channel MOSFET 2 (pins 7 and 8 are internally the same drain); drain-source voltage is rated 40 V. |
| 8 | D2 | passive | Drain terminal of N-channel MOSFET 2 (same net as pin 7); drain-source voltage is rated 40 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | VDS | 40 | V | VGS=0V, ID=250µA | 3 | ||
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VDS=0V, VGS=±20V | 3 | |
| Drain-Source On-State Resistance | RDS(ON) | 0.028 | Ω | VGS=10V, ID=4.5A | 3 | ||
| Drain-Source On-State Resistance | RDS(ON) | 0.03 | Ω | VGS=4.5V, ID=4A | 3 | ||
| Drain-Source Voltage | VDS | 40 | V | TC=25°C | 1 | ||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | 7 | A | TC=25°C | 1 | ||
| Pulsed Drain Current | IDM | 28 | A | Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 % | 1 | ||
| Single Pulse Avalanche Current | IAS | 18 | A | L=0.1mH | 1 | ||
| Single Pulse Avalanche Energy | EAS | 16.2 | mJ | L=0.1mH | 1 | ||
| Storage Temperature / Junction Temperature | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Junction-to-Ambient Thermal Resistance | RthJA | 110 | °C/W | PCB Mount, 1" square PCB (FR4) | 2 |
CAD (KiCad official)
- Symbol:
AO4840 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ao4840-etched.step/ao4840-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ao4840.step/ao4840.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (9 pp, sha256
296ee7b32f676934, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AO4840
**UMW** · MOSFETs · SOP-8
AO4840 from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S2 | passive | Source terminal of N-channel MOSFET 2; device VDS is 40 V and gate-source voltage is limited to ±20 V. |
| 2 | G2 | input | Gate terminal of N-channel MOSFET 2; gate-source voltage is rated ±20 V (VGS). |
| 3 | S1 | passive | Source terminal of N-channel MOSFET 1; device VDS is 40 V and gate-source voltage is limited to ±20 V. |
| 4 | G1 | input | Gate terminal of N-channel MOSFET 1; gate-source voltage is rated ±20 V (VGS). |
| 5 | D1 | passive | Drain terminal of N-channel MOSFET 1 (pins 5 and 6 are internally the same drain); drain-source voltage is rated 40 V. |
| 6 | D1 | passive | Drain terminal of N-channel MOSFET 1 (same net as pin 5); drain-source voltage is rated 40 V. |
| 7 | D2 | passive | Drain terminal of N-channel MOSFET 2 (pins 7 and 8 are internally the same drain); drain-source voltage is rated 40 V. |
| 8 | D2 | passive | Drain terminal of N-channel MOSFET 2 (same net as pin 7); drain-source voltage is rated 40 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | VDS | 40 | | | V | VGS=0V, ID=250µA | 3 |
| Gate-Source Leakage | IGSS | -100 | | 100 | nA | VDS=0V, VGS=±20V | 3 |
| Drain-Source On-State Resistance | RDS(ON) | | | 0.028 | Ω | VGS=10V, ID=4.5A | 3 |
| Drain-Source On-State Resistance | RDS(ON) | | | 0.03 | Ω | VGS=4.5V, ID=4A | 3 |
| Drain-Source Voltage | VDS | | | 40 | V | TC=25°C | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current | ID | | | 7 | A | TC=25°C | 1 |
| Pulsed Drain Current | IDM | | | 28 | A | Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 % | 1 |
| Single Pulse Avalanche Current | IAS | | | 18 | A | L=0.1mH | 1 |
| Single Pulse Avalanche Energy | EAS | | | 16.2 | mJ | L=0.1mH | 1 |
| Storage Temperature / Junction Temperature | TJ, TSTG | -55 | | 150 | °C | | 1 |
| Junction-to-Ambient Thermal Resistance | RthJA | | | 110 | °C/W | PCB Mount, 1" square PCB (FR4) | 2 |
## CAD (KiCad official)
- Symbol: `AO4840`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `ao4840-etched.step` / `ao4840-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ao4840.step` / `ao4840.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755875319595720704) (9 pp, sha256 `296ee7b32f676934`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ao4840-datasheet.pdf)