component

AO4812-VB

Public Made by Adom

by adom

VBsemi Elec MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsao4812-vbfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 16d ago
viewers ao4812-vb: viewers · Ray 16d ago
ao4812-vb-etched.glb Publish 0.1.0 · Ray 16d ago
ao4812-vb-etched.step ao4812-vb: factory component page (tier=lcsc) · Ray 16d ago
ao4812-vb-hero.glb ao4812-vb: hero GLB from the etched model (keeps the MPN mark) · Ray 16d ago
ao4812-vb-hero.overlay.json Publish 0.1.0 · Ray 16d ago
ao4812-vb.glb Publish 0.1.0 · Ray 16d ago
ao4812-vb.kicad_mod Publish 0.1.0 · Ray 16d ago
ao4812-vb.kicad_sym Publish 0.1.0 · Ray 16d ago
ao4812-vb.lbr Publish 0.1.0 · Ray 16d ago
ao4812-vb.step Publish 0.1.0 · Ray 16d ago
package.json Publish 0.1.0 · Ray 16d ago
page.json Set visibility: public · Ray 16d ago
README.md Publish 0.1.0 · Ray 16d ago

AO4812-VB

VBsemi Elec · MOSFETs · SO-8

AO4812-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source terminal of N-channel MOSFET 1 (dual N-channel 30 V device); the datasheet gives no separate pin-level limit.
2 G1 input Gate terminal of N-channel MOSFET 1; gate-source voltage is rated ±20 V per the absolute maximum ratings.
3 S2 passive Source terminal of N-channel MOSFET 2 (dual N-channel 30 V device); the datasheet gives no separate pin-level limit.
4 G2 input Gate terminal of N-channel MOSFET 2; gate-source voltage is rated ±20 V per the absolute maximum ratings.
5 D2 passive Drain terminal of N-channel MOSFET 2; drain-source voltage is rated 30 V per the absolute maximum ratings.
6 D2 passive Drain terminal of N-channel MOSFET 2 (second drain pin, internally tied to pin 5); drain-source voltage is rated 30 V.
7 D1 passive Drain terminal of N-channel MOSFET 1; drain-source voltage is rated 30 V per the absolute maximum ratings.
8 D1 passive Drain terminal of N-channel MOSFET 1 (second drain pin, internally tied to pin 7); drain-source voltage is rated 30 V.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 30 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 6.2 A TA = 25 °C 1
Continuous Drain Current ID 5.2 A TA = 70 °C 1
Continuous Drain Current ID 6.8 A TC = 25 °C 1
Continuous Drain Current ID 5.6 A TC = 70 °C 1
Pulsed Drain Current IDM 30 A 1
Continuous Source-Drain Diode Current IS 2.25 A TC = 25 °C 1
Single Pulse Avalanche Current IAS 5 A L = 0.1 mH 1
Single Pulse Avalanche Energy EAS 1.25 mJ 1
Maximum Power Dissipation PD 2.7 W TC = 25 °C 1
Maximum Power Dissipation PD 1.77 W TC = 70 °C 1
Maximum Power Dissipation PD 1.78 W TA = 25 °C 1
Maximum Power Dissipation PD 1.14 W TA = 70 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 58 70 °C/W t ≤ 10 s 1
Maximum Junction-to-Foot (Drain) RthJF 38 45 °C/W Steady State 1
Maximum Junction-to-Ambient (steady state, note d) RthJA 110 °C/W Steady State 1
Drain-Source Breakdown Voltage VDS 30 V VGS = 0 V, ID = 250 µA 2
Gate-Source Threshold Voltage VGS(th) 1 2.5 V VDS = VGS, ID = 250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ±20 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 30 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 10 µA VDS = 30 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) 10 A VDS ≥ 5 V, VGS = 10 V 2
Drain-Source On-State Resistance RDS(on) 0.026 Ω VGS = 4.5 V, ID = 4 A 2
Gate Resistance Rg 0.8 4.3 8.6 Ω f = 1 MHz 2
Total Gate Charge Qg 3.7 5.6 nC VDS = 15 V, VGS = 4.5 V, ID = 5 A 2
Turn-On Delay Time td(on) 12 24 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 4.5 V, Rg = 1 Ω 2
Rise Time tr 55 100 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 11 22 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 4.5 V, Rg = 1 Ω 2
Fall Time tf 8 16 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-On Delay Time td(on) 4 8 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω 2
Rise Time tr 9 18 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 10 20 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω 2
Fall Time tf 6 12 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω 2
Body Diode Voltage VSD 0.8 1.2 V IS = 2 A, VGS = 0 V 2
Body Diode Reverse Recovery Time trr 11 20 ns IF = 5 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 4 8 nC IF = 5 A, dI/dt = 100 A/µs, TJ = 25 °C 2

CAD (KiCad official)

  • Symbol: AO4812-VB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: ao4812-vb-etched.step / ao4812-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ao4812-vb.step / ao4812-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (9 pp, sha256 684c313193f5d0c4, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF