component
AO4407-MS
Public Made by Adomby adom
MSKSEMI MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AO4407-MS
MSKSEMI · MOSFETs · SOP-8
AO4407-MS from MSKSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, one of three source pins tied together on the SOP-8 package. |
| 2 | S | passive | Source of the P-channel MOSFET, one of three source pins tied together on the SOP-8 package. |
| 3 | S | passive | Source of the P-channel MOSFET, one of three source pins tied together on the SOP-8 package. |
| 4 | G | input | Gate of the P-channel MOSFET, with a gate-source voltage limit of ±20 V and a threshold of -1 to -2.5 V. |
| 5 | D | passive | Drain of the P-channel MOSFET (VDS = -30 V, ID = -12 A), one of four drain pins tied together. |
| 6 | D | passive | Drain of the P-channel MOSFET (VDS = -30 V, ID = -12 A), one of four drain pins tied together. |
| 7 | D | passive | Drain of the P-channel MOSFET (VDS = -30 V, ID = -12 A), one of four drain pins tied together. |
| 8 | D | passive | Drain of the P-channel MOSFET (VDS = -30 V, ID = -12 A), one of four drain pins tied together. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
AO4407-MS - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ao4407-ms-etched.step/ao4407-ms-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ao4407-ms.step/ao4407-ms.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MSKSEMI datasheet (8 pp, sha256
e89f3567182a90b1, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AO4407-MS
**MSKSEMI** · MOSFETs · SOP-8
AO4407-MS from MSKSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, one of three source pins tied together on the SOP-8 package. |
| 2 | S | passive | Source of the P-channel MOSFET, one of three source pins tied together on the SOP-8 package. |
| 3 | S | passive | Source of the P-channel MOSFET, one of three source pins tied together on the SOP-8 package. |
| 4 | G | input | Gate of the P-channel MOSFET, with a gate-source voltage limit of ±20 V and a threshold of -1 to -2.5 V. |
| 5 | D | passive | Drain of the P-channel MOSFET (VDS = -30 V, ID = -12 A), one of four drain pins tied together. |
| 6 | D | passive | Drain of the P-channel MOSFET (VDS = -30 V, ID = -12 A), one of four drain pins tied together. |
| 7 | D | passive | Drain of the P-channel MOSFET (VDS = -30 V, ID = -12 A), one of four drain pins tied together. |
| 8 | D | passive | Drain of the P-channel MOSFET (VDS = -30 V, ID = -12 A), one of four drain pins tied together. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `AO4407-MS`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `ao4407-ms-etched.step` / `ao4407-ms-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ao4407-ms.step` / `ao4407-ms.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [MSKSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8555434933086363648) (8 pp, sha256 `e89f3567182a90b1`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ao4407-ms-datasheet.pdf)