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Made with kicad-footprint-generator 10.0 · KiCad file format 20260206
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docs Correct AO3400A electrical summary and replace underspan generic CAD with drawing-led nominal assets · John Lauer 22d ago
skills Publish 0.1.1 · John Lauer 22d ago
viewers Publish 0.1.1 · John Lauer 22d ago
ao3400-etched.fit.json ao3400: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ao3400-etched.glb Publish 0.1.1 · John Lauer 22d ago
ao3400-etched.step Publish 0.1.1 · John Lauer 22d ago
ao3400-hero.glb Publish 0.1.1 · John Lauer 22d ago
ao3400-hero.overlay.json Publish 0.1.1 · John Lauer 22d ago
ao3400.glb Publish 0.1.1 · John Lauer 22d ago
ao3400.kicad_mod Publish 0.1.1 · John Lauer 22d ago
ao3400.kicad_sym Publish 0.1.1 · John Lauer 22d ago
ao3400.lbr Publish 0.1.1 · John Lauer 22d ago
ao3400.step Publish 0.1.1 · John Lauer 22d ago
ao3400a-ai-nominal-marked.check.json Publish 0.1.1 · John Lauer 22d ago
ao3400a-ai-nominal-marked.check.png Publish 0.1.1 · John Lauer 22d ago
ao3400a-ai-nominal-marked.glb Publish 0.1.1 · John Lauer 22d ago
ao3400a-ai-nominal-marked.mark-plan.json Publish 0.1.1 · John Lauer 22d ago
ao3400a-ai-nominal-marked.step Publish 0.1.1 · John Lauer 22d ago
ao3400a-ai-nominal.step Publish 0.1.1 · John Lauer 22d ago
AO3400A.adom-lbr.json Publish 0.1.1 · John Lauer 22d ago
AO3400A.lbr Publish 0.1.1 · John Lauer 22d ago
build_nominal_model.py Publish 0.1.1 · John Lauer 22d ago
LICENSE-KICAD.md Publish 0.1.1 · John Lauer 22d ago
package.json Publish 0.1.1 · John Lauer 22d ago
page.json Correct AO3400A electrical summary and replace underspan generic CAD with drawing-led nominal assets · John Lauer 22d ago
provenance-correction.json Publish 0.1.1 · John Lauer 22d ago
README.md Publish 0.1.1 · John Lauer 22d ago

AO3400A

Alpha & Omega Semiconductor30V N-channel MOSFET, SOT-23. Pin1 gate,2 source,3 drain; body diode conducts source to drain.

The Rev3.1 datasheet specifies maximum on-resistance26.5/32/48mOhm at gate voltages10/4.5/2.5V respectively, at25C and stated test currents. Threshold0.65–1.45V is not a full-enhancement voltage. Absolute gate voltage is±12V. Current and power ratings depend on the stated board and thermal conditions.

Do not treat it as a universal2N7002 replacement: drain rating is30V, gate capacitance is larger, and reset discharge and fault timing need review. Verify minimum logic-output voltage and gate transients.

The footprint follows AOS PO-00001N:0.8mm square pads,2.4mm row spacing and0.95mm pitch. CAD is an original nominal Adom reconstruction,2.8mm lead span,2.9×1.6mm body and1.2mm height. Tapers, polygonal lead bends and colors are illustrative. The full MPN is a virtual identification mark, not factory ink. Physical fit and process qualification remain open.

Version0.1.1 corrects the prior summary and replaces a generic model whose2.5mm lead span was below the drawing minimum2.6mm. KiCad-derived symbol/footprint retain their attribution; see LICENSE-KICAD.md. STEP uses millimeters, GLB meters. Use board-use GLB/STEP in assemblies, not the annotated hero.

Manufacturer datasheet · Package drawing

The model generator runs in the existing shared service-step2glb OCP environment; it is source provenance, not an install-time dependency. The verified DigiKey cut-tape identifier is785-1000-1-ND. Other distributor IDs remain unverified.