component
AMT49105KEVTR-J
Public Made by Adomby adom
Allegro MicroSystems, LLC Gate Drive ICs, QFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"version": "0.1.0",
"type": "component",
"description": "Allegro MicroSystems, LLC Gate Drive ICs, QFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"component",
"power management",
"amt49105kevtr-j",
"factory-2.0.0",
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"component": {
"mpn": "AMT49105KEVTR-J",
"manufacturer": "Allegro MicroSystems, LLC",
"package": "QFN-48(7x7)",
"pin_count": 49,
"category": "Power Management",
"subcategory": "Gate Drive ICs",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/f1e650080ad52f165a41468eca3804f6.pdf",
"parts": {
"symbol": "amt49105kevtr-j.kicad_sym",
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"lbr": "amt49105kevtr-j.lbr"
},
"distributor_links": {
"lcsc": "C5551194",
"digikey": "620-AMT49105KEVTR-JTR-ND",
"mouser": "250-AMT49105KEVTR-J"
},
"distributor_check": {
"checked_at": "2026-10-28T15:50:04Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "620-AMT49105KEVTR-JTR-ND",
"status": "found"
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"pn": "250-AMT49105KEVTR-J",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "VLR",
"type": "power_out",
"description": "VLR is the logic supply regulator output, selectable as 3.3 or 5 V, and requires a ceramic capacitor of at least 1 µF with ESR no more than 250 mΩ to GND for stability."
},
{
"number": "2",
"name": "ENABLE",
"type": "input",
"description": "ENABLE disables all gate drive outputs when pulled low in direct mode or after a timeout in watchdog mode."
},
{
"number": "3",
"name": "HA",
"type": "input",
"description": "HA is the logic input controlling the high-side gate drive output, with a pull-down connected to the input."
},
{
"number": "4",
"name": "LA",
"type": "input",
"description": "LA is the logic input controlling the low-side gate drive output, with a pull-down connected to the input."
},
{
"number": "5",
"name": "HB",
"type": "input",
"description": "HB is the logic input controlling the high-side gate drive output, with a pull-down connected to the input."
},
{
"number": "6",
"name": "LB",
"type": "input",
"description": "LB is the logic input controlling the low-side gate drive output, with a pull-down connected to the input."
},
{
"number": "7",
"name": "HC",
"type": "input",
"description": "HC is the logic input controlling the high-side gate drive output, with a pull-down connected to the input."
},
{
"number": "8",
"name": "LC",
"type": "input",
"description": "LC is the logic input controlling the low-side gate drive output, with a pull-down connected to the input."
},
{
"number": "9",
"name": "WDOG",
"type": "input",
"description": "WDOG is the external microcontroller window watchdog input with resistor pull-down and programmable minimum and maximum clock period."
},
{
"number": "10",
"name": "STRn",
"type": "input",
"description": "STRn is the serial strobe and chip-select input with resistor pull-up; when high, SCK and SDI activity is ignored."
},
{
"number": "11",
"name": "SCK",
"type": "input",
"description": "SCK is the serial clock input with resistor pull-down; data is latched in from SDI on the rising edge."
},
{
"number": "12",
"name": "SDI",
"type": "input",
"description": "SDI is the serial data input with resistor pull-down accepting a 16-bit serial word, MSB first."
},
{
"number": "13",
"name": "SDO",
"type": "output",
"description": "SDO is the serial data output, high impedance or clock output when STRn is high, and outputs the fault flag (Status register bit 15) as soon as STRn goes low."
},
{
"number": "14",
"name": "MRSTn",
"type": "output",
"description": "MRSTn is the microcontroller reset output that holds the microcontroller in reset until supplies are available and resets it on watchdog failure."
},
{
"number": "15",
"name": "BXM",
"type": "output",
"description": "BXM is the BEMF zero crossing multiplex logic output representing the state of a selected phase relative to the average voltage of the three phases."
},
{
"number": "16",
"name": "CSO",
"type": "output",
"description": "CSO is the current sense amplifier output."
},
{
"number": "17",
"name": "CSM",
"type": "input",
"description": "CSM is the negative differential current sense amplifier input, connected directly to one end of the sense resistor on a separate PCB trace."
},
{
"number": "18",
"name": "CSP",
"type": "input",
"description": "CSP is the positive differential current sense amplifier input, connected directly to the other end of the sense resistor on a separate PCB trace."
},
{
"number": "19",
"name": "PM",
"type": "input",
"description": "PM is the program mode logic input that disables the watchdog and MRSTn."
},
{
"number": "20",
"name": "LRX",
"type": "output",
"description": "LRX is the LIN or PWM receive logic level output."
},
{
"number": "21",
"name": "LTX",
"type": "input",
"description": "LTX is the LIN or FAULT transmit logic level input."
},
{
"number": "22",
"name": "LIN",
"type": "bidirectional",
"description": "LIN is the LIN bus connection compliant with ISO17987 (LIN 2.x) and can also be used as a PWM input passed to LRX."
},
{
"number": "23",
"name": "GND",
"type": "power_in",
"description": "GND is the analog reference, digital, and power ground; all GND terminals must be connected together to supply ground."
},
{
"number": "24",
"name": "GND",
"type": "power_in",
"description": "GND is the analog reference, digital, and power ground; all GND terminals must be connected together to supply ground."
},
{
"number": "25",
"name": "LSSC",
"type": "passive",
"description": "LSSC is the low-side return path for discharge of the low-side MOSFET gate capacitance, connected through a low-impedance track to the common source of the phase C low-side MOSFETs."
},
{
"number": "26",
"name": "GLC",
"type": "output",
"description": "GLC is the phase C low-side gate-drive output for an external N-channel MOSFET."
},
{
"number": "27",
"name": "GHC",
"type": "output",
"description": "GHC is the phase C high-side gate-drive output for an external N-channel MOSFET."
},
{
"number": "28",
"name": "SC",
"type": "passive",
"description": "SC is the phase C motor connection that senses the voltage switched across the load and serves as the negative supply for the floating high-side driver."
},
{
"number": "29",
"name": "CC",
"type": "power_in",
"description": "CC is the phase C high-side bootstrap capacitor connection and positive supply for the high-side gate driver."
},
{
"number": "30",
"name": "LSSB",
"type": "passive",
"description": "LSSB is the low-side return path for discharge of the low-side MOSFET gate capacitance, connected through a low-impedance track to the common source of the phase B low-side MOSFETs."
},
{
"number": "31",
"name": "GLB",
"type": "output",
"description": "GLB is the phase B low-side gate-drive output for an external N-channel MOSFET."
},
{
"number": "32",
"name": "GHB",
"type": "output",
"description": "GHB is the phase B high-side gate-drive output for an external N-channel MOSFET."
},
{
"number": "33",
"name": "SB",
"type": "passive",
"description": "SB is the phase B motor connection that senses the voltage switched across the load and serves as the negative supply for the floating high-side driver."
},
{
"number": "34",
"name": "CB",
"type": "power_in",
"description": "CB is the phase B high-side bootstrap capacitor connection and positive supply for the high-side gate driver."
},
{
"number": "35",
"name": "LSSA",
"type": "passive",
"description": "LSSA is the low-side return path for discharge of the low-side MOSFET gate capacitance, connected through a low-impedance track to the common source of the phase A low-side MOSFETs."
},
{
"number": "36",
"name": "GLA",
"type": "output",
"description": "GLA is the phase A low-side gate-drive output for an external N-channel MOSFET."
},
{
"number": "37",
"name": "GHA",
"type": "output",
"description": "GHA is the phase A high-side gate-drive output for an external N-channel MOSFET."
},
{
"number": "38",
"name": "SA",
"type": "passive",
"description": "SA is the phase A motor connection that senses the voltage switched across the load and serves as the negative supply for the floating high-side driver."
},
{
"number": "39",
"name": "CA",
"type": "power_in",
"description": "CA is the phase A high-side bootstrap capacitor connection and positive supply for the high-side gate driver."
},
{
"number": "40",
"name": "VREG",
"type": "power_out",
"description": "VREG is the regulated gate drive supply output, selectable as 8 or 11 V, requiring a storage capacitor of at least 4.7 µF (X7R, 50 V)."
},
{
"number": "41",
"name": "CP2",
"type": "passive",
"description": "CP2 is the charge pump capacitor connection; a 470 nF ceramic capacitor is connected between CP1 and CP2."
},
{
"number": "42",
"name": "CP1",
"type": "passive",
"description": "CP1 is the charge pump capacitor connection; a 470 nF ceramic capacitor is connected between CP1 and CP2."
},
{
"number": "43",
"name": "GND",
"type": "power_in",
"description": "GND is the analog reference, digital, and power ground; all GND terminals must be connected together to supply ground."
},
{
"number": "44",
"name": "VBB",
"type": "power_in",
"description": "VBB is the main power supply input for the internal regulators and charge pump, operating from 5.5 to 50 V and connected through reverse voltage protection."
},
{
"number": "45",
"name": "IG",
"type": "input",
"description": "IG is the ignition switch input with resistor pull-down that wakes the device and enables the logic regulator, with input thresholds allowing ±2 V ground difference."
},
{
"number": "46",
"name": "BRSW",
"type": "passive",
"description": "BRSW is a switched version of the VBRG voltage, high impedance in sleep mode, which can also be switched off via the serial interface."
},
{
"number": "47",
"name": "VBRG",
"type": "input",
"description": "VBRG is the sense input to the top of the external MOSFET bridge for measuring the drain voltage of the high-side MOSFETs."
},
{
"number": "48",
"name": "DIAG",
"type": "output",
"description": "DIAG is the programmable diagnostic output that can be shorted to ground or VBB without damage."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pinout diagram on page 4 labels pin 13 as SDC while the terminal list on the same page gives SDO; th",
"32/49 pins cited to the wrong page (name found elsewhere): ['6:LB@p19', '9:WDOG@p19', '12:SDI@p19', '13:SDO@p19']"
],
"pages_sent": 8,
"cost_usd": 0.035,
"at": "2026-10-28T15:49:28"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/f1e650080ad52f165a41468eca3804f6.pdf",
"pages": 73,
"sha256": "8c36e089ba9b6cc3",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
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"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
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"sha256": "c26c9ba7eb93d4ecb0f63dc4d7ae0e446dc1eb82835220ce4f5cd6fddb6e5bcf",
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}