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Contents

README

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AMC3330QDWERQ1

Texas Instruments · Isolation Amplifiers · SOIC-16-300mil

AMC3330QDWERQ1 from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DCDC_OUT power_out High-side output of the isolated DC/DC converter; connect this pin to the HLDO_IN pin.
2 DCDC_HGND power_in High-side ground reference for the isolated DC/DC converter; connect this pin to the HGND pin.
3 HLDO_IN power_in Input of the high-side low-dropout (LDO) regulator; connect this pin to the DCDC_OUT pin.
4 NC unconnected No internal connection; connect this pin to the high-side ground or leave it unconnected (floating).
5 HLDO_OUT power_out Output of the high-side LDO.
6 INP input Noninverting analog input with a ±1 V linear full-scale differential input range (±1.25 V before clipping).
7 INN input Inverting analog input; connect this pin to HGND.
8 HGND power_in High-side analog ground; connect this pin to the DCDC_HGND pin.
9 GND power_in Low-side analog ground; connect this pin to the DCDC_GND pin.
10 OUTN output Inverting analog output.
11 OUTP output Noninverting analog output.
12 VDD power_in Low-side power supply, 3.0 V to 5.5 V relative to GND.
13 LDO_OUT power_out Output of the low-side LDO; connect this pin to the DCDC_IN pin.
14 DIAG output Active-low, open-drain status indicator output; connect to the pullup supply (for example, VDD) using a resistor or leave floating if not used.
15 DCDC_GND power_in Low-side ground reference for the isolated DC/DC converter; connect this pin to the GND pin.
16 DCDC_IN power_in Low-side input of the isolated DC/DC converter; connect this pin to the LDO_OUT pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Operational Amplifier/Comparator
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Single-ended input resistance RIN 0.1 0.8 GΩ INN = HGND 8
Differential input resistance RIND 0.1 1.2 GΩ 8
Input bias current IIB -10 2.5 10 nA INP = INN = HGND, IIB = (IIBP + IIBN) / 2 8
Input offset current IIO -10 -0.8 10 nA IIO = IINP, IINN; INP = INN = HGND 8
Common-mode output voltage VCMout 1.39 1.44 1.49 V 8
Failsafe differential output voltage VFailsafe -2.57 -2.5 V V+ = (VOUTP, VOUTN); VDCDCout ≤ VDCDCUV or VHLDOout ≤ VHLDOUV 8
Output bandwidth BWOUT 300 375 kHz 8
Common-mode transient immunity CMTI 85 135 kV/µs /HGND, GND/ = 2 kV 8
Input offset voltage VOS -0.3 0.05 0.3 mV TA = 25°C, INP = INN = HGND 8
Input offset drift TCVOS -4 1 4 µV/°C 8
Gain error EG -0.2 -0.08 0.2 % TA = 25°C 8
Gain error drift TCEG -45 7 45 ppm/°C 8
Nonlinearity -0.02 0.01 0.02 % 8
Signal-to-noise ratio SNR 81 85 dB VIN = 2 VPP, fIN = 1 kHz, BW = 10 kHz, 10 kHz filter 8
Common-mode rejection ratio CMRR -100 dB fIN = 0 Hz, VCM min ≤ VCM ≤ VCM max 8
Common-mode rejection ratio CMRR -86 dB fIN = 10 kHz, VCM min ≤ VCM ≤ VCM max 8
Low-level output voltage DIAG VOL 80 250 mV ISINK= 4 mA 8
Open-drain output leakage current ILKG 5 100 nA VDD = 5V 9
Low-side supply current IDD 28.5 41 mA No external load on HLDO 9
Low-side supply current IDD 30.5 43 mA 1 mA external load on HLDO 9
DC/DC output voltage VDCDC_OUT 3.1 3.5 4.65 V DCDC_OUT to HGND 9
DC/DC output undervoltage detection threshold VDCDCUV 2.1 2.25 V DCDC output falling 9
High-side LDO output voltage VHLDO_OUT 3 3.2 3.4 V HLDO to HGND, up to 1 mA external load 9
High-side LDO undervoltage detection threshold VHLDOUV 2.4 2.6 V HLDO output falling 9
Analog settling time tAS 0.6 1.1 ms VDD step to 3.0 V, to OUTP and OUTN valid, 0.1% settling 9
VINx to VOUTx signal delay (50%, 10%) 1.2 1.3 µs Unfiltered output 9
VINx to VOUTx signal delay (50%, 50%) 1.6 2.1 µs Unfiltered output 9
VINx to VOUTx signal delay (50%, 90%) 2.2 2.6 µs Unfiltered output 9
Low-side supply voltage VDD 3 3.3 5.5 V VDD to GND 4
Specified linear differential full-scale voltage VFSR -1 1 V VIN = VINP, VINN 4
Operating ambient temperature TA -40 25 125 °C 4
Power-supply voltage VDD -0.3 6.5 V VDD to GND 4
Digital output voltage DIAG 6.5 V min GND, 0.5 4
Input current -10 10 mA Continuous, any pin except power-supply pins 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Junction-to-ambient thermal resistance RθJA 73.5 °C/W DWE (SOIC) 16 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 31 °C/W 5
Junction-to-board thermal resistance RθJB 44 °C/W 5

CAD (KiCad official)

  • Symbol: AMC3330QDWERQ1
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: amc3330qdwerq1-etched.step / amc3330qdwerq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); amc3330qdwerq1.step / amc3330qdwerq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 8b8ffe975f1a7adb, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF