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AMC3311DWER

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Texas Instruments Isolation Amplifiers With Power, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AMC3311DWER

Texas Instruments · Isolation Amplifiers With Power · SOIC-16

AMC3311DWER from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DCDC_OUT power_out High-side output of the isolated DC/DC converter; connect this pin to the HLDO_IN pin.
2 DCDC_HGND power_in High-side ground reference for the isolated DC/DC converter; connect this pin to the HGND pin.
3 HLDO_IN power_in Input of the high-side low-dropout (LDO) regulator; connect this pin to the DCDC_OUT pin.
4 NC unconnected No internal connection; connect this pin to the high-side ground or leave it unconnected (floating).
5 HLDO_OUT power_out Output of the high-side LDO; see the Power Supply Recommendations section for decoupling.
6 IN input Analog input with a specified linear full-scale range of -0.1 V to 2 V with respect to HGND.
7 HGND power_in High-side analog ground; connect both HGND pins to the DCDC_HGND pin.
8 HGND power_in High-side analog ground; connect both HGND pins to the DCDC_HGND pin.
9 GND power_in Low-side analog ground; connect this pin to the DCDC_GND pin.
10 OUTN output Inverting analog output, with absolute maximum voltage of GND - 0.5 V to VDD + 0.5 V.
11 OUTP output Noninverting analog output, with absolute maximum voltage of GND - 0.5 V to VDD + 0.5 V.
12 VDD power_in Low-side power supply, recommended 3.0 V to 5.5 V with respect to GND.
13 LDO_OUT power_out Output of the low-side LDO; connect this pin to the DCDC_IN pin.
14 DIAG output Active-low, open-drain status indicator output; connect to a pullup supply (up to VDD) through a resistor or leave floating if not used.
15 DCDC_GND power_in Low-side ground reference for the isolated DC/DC converter; connect this pin to the GND pin.
16 DCDC_IN power_in Low-side input of the isolated DC/DC converter; connect this pin to the LDO_OUT pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Signal Isolation Devices
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power-supply voltage VDD to GND VDD -0.3 6.5 V 4
Analog input voltage IN -6 V Min is HGND, 6; max is VHLDO_OUT + 0.5 4
Analog output voltage OUTP, OUTN -0.5 V Min is GND, 0.5; max is VDD + 0.5 4
Digital output voltage DIAG -0.5 6.5 V Min is GND, 0.5 4
Input current -10 10 mA Continuous, any pin except power-supply pins 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
ESD HBM V(ESD) -2000 2000 V Human-body model per ANSI/ESDA/JEDEC JS-001 4
ESD CDM V(ESD) -1000 1000 V Charged-device model per ANSI/ESDA/JEDEC JS-002 4
Low-side supply voltage VDD 3 3.3 5.5 V VDD to GND 4
Specified linear full-scale voltage VFSR -0.1 2 V IN to HGND 4
Input voltage before clipping output VClipping 2.516 V IN to HGND 4
Capacitive load, OUTP or OUTN to GND CLOAD 500 pF On OUTP or OUTN to GND 4
Capacitive load, OUTP to OUTN CLOAD 250 pF OUTP to OUTN 4
DIAG pull-up supply voltage 0 V Max is VDD 4
Operating ambient temperature TA -40 25 125 °C 4
Junction-to-ambient thermal resistance RθJA 73.5 °C/W DWE (SOIC) 16 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 31 °C/W DWE (SOIC) 16 pins 5
Junction-to-board thermal resistance RθJB 44 °C/W DWE (SOIC) 16 pins 5
Input bias current IIB -15 3.5 15 nA IN = HGND, TA = 25℃ 8
Common-mode output voltage VCMout 1.39 1.44 1.49 V 8
Failsafe differential output voltage VFAILSAFE -2.6 -2.5 V VOUT = (VOUTP, VOUTN); VDCDC_OUT ≤ VDCDCUV, or VHLDO_OUT ≤ VHLDOUV 8
Output bandwidth BW 220 275 kHz 8
Common-mode transient immunity CMTI 85 135 kV/µs 8
Input offset voltage VOS -1 0.1 1 mV TA = 25°C, IN = HGND 8
Input offset thermal drift TCVOS -10 3 10 µV/°C 8
Gain error EG -0.2 0.05 0.2 % TA = 25°C 8
Gain error drift TCEG -40 5 40 ppm/°C 8
Nonlinearity -0.02 0.01 0.02 % 8
Signal-to-noise ratio SNR 75.5 78.4 dB VIN = 2 VPP, VIN > 0 V, fIN = 1 kHz, BW = 10 kHz, 10 kHz filter 8
Low-side supply current, no HLDO load IDD 28.5 41 mA No external load on HLDO 9
Low-side supply current, 4 mA HLDO load IDD 36.5 49 mA 4 mA external load on HLDO 9
DC/DC output voltage VDCDC_OUT 3.1 3.4 4.65 V DCDC_OUT to HGND 9
DC/DC output undervoltage detection threshold VDCDCUV 2.1 2.25 V DCDC output falling 9
High-side LDO output voltage VHLDO_OUT 3 3.2 3.4 V HLDO to HGND, no external load 9
High-side LDO undervoltage detection threshold VHLDOUV 2.4 2.6 V HLDO output falling 9
Analog settling time tAS 0.6 1.1 ms VDD step to 3.0 V, to OUTP and OUTN valid, 0.1% settling 9
VIN to VOUTx delay (50%, 50%) 1.6 2.1 µs Unfiltered output 9
Output signal rise time tr 1.3 µs 9

CAD (KiCad official)

  • Symbol: AMC3311DWER
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: amc3311dwer-etched.step / amc3311dwer-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); amc3311dwer.step / amc3311dwer.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 de43869248e1e08b, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF