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AMC3302QDWERQ1

Texas Instruments · Isolation Amplifiers · SOIC-16-300mil

AMC3302QDWERQ1 from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DCDC_OUT power_out High-side output of the isolated DC/DC converter; connect this pin to the HLDO_IN pin.
2 DCDC_HGND power_in High-side ground reference for the isolated DC/DC converter; connect this pin to the HGND pin.
3 HLDO_IN power_in Input of the high-side LDO; connect this pin to the DCDC_OUT pin.
4 NC unconnected No internal connection; connect this pin to HGND or leave it unconnected.
5 HLDO_OUT power_out Output of the high-side LDO; see the Power Supply Recommendations section for decoupling.
6 INP input Noninverting analog input; either INP or INN must have a DC current path to HGND to define the common-mode input voltage.
7 INN input Inverting analog input; either INP or INN must have a DC current path to HGND to define the common-mode input voltage.
8 HGND power_in High-side analog ground; connect this pin to the DCDC_HGND pin.
9 GND power_in Low-side analog ground; connect this pin to the DCDC_GND pin.
10 OUTN output Inverting analog output.
11 OUTP output Noninverting analog output.
12 VDD power_in Low-side power supply; see the Power Supply Recommendations section for decoupling.
13 LDO_OUT power_out Output of the low-side LDO; connect this pin to the DCDC_IN pin, and the LDO output must not be loaded by external circuitry.
14 DIAG output Active-low, open-drain status indicator output; connect it to the pullup supply (for example, VDD) through a resistor, or leave it floating if not used.
15 DCDC_GND power_in Low-side ground reference for the isolated DC/DC converter; connect this pin to the GND pin.
16 DCDC_IN power_in Low-side input of the isolated DC/DC converter; connect this pin to the LDO_OUT pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Signal Isolation Devices
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power-supply voltage VDD to GND VDD -0.3 6.5 V VDD to GND 4
Analog input voltage INP, INN VINP, VINN -6 V Referenced to HGND (printed HGND, 6 V). Max printed as VHLDO_OUT + 0.5 V, expression not converted 4
Analog output voltage OUTP, OUTN VOUTP, VOUTN -0.5 V Referenced to GND (printed GND, 0.5 V). Max printed as VDD + 0.5 V, expression not converted 4
Digital output voltage DIAG VDIAG -0.5 6.5 V Referenced to GND (printed GND, 0.5 V) 4
Input current, continuous, any pin except power-supply pins II -10 10 mA Continuous, any pin except power-supply pins 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Low-side power supply VDD 3 3.3 5.5 V VDD to GND 4
Differential input voltage before clipping output VClipping -64 64 mV VIN = VINP, VINN; printed ±64 mV 4
Specified linear differential full-scale voltage VFSR -50 50 mV VIN = VINP, VINN 4
Absolute common-mode input voltage VCM abs -2 V (VINP + VINN) / 2 to HGND. Max printed as VHLDO_OUT, expression not converted 4
Operating common-mode input voltage VCM -0.032 1 V (VINP + VINN) / 2 to HGND 4
Specified ambient temperature TA -40 125 °C 4
Input bias current IIB -48.5 -36 -28.5 µA INP = INN = HGND; IIB = (IIBP + IIBN) / 2 8
Input offset current IIO -10 10 nA IIO = IIBP, IIBN; INP = INN = HGND; printed ±10 nA 8
Common-mode output voltage VCMout 1.39 1.44 1.49 V 8
Clipping differential output voltage VCLIPout -2.52 2.49 2.52 V VOUT = (VOUTP, VOUTN); /VIN/ = /VINP, VINN/ > VClipping 8
Failsafe differential output voltage VFailsafe -2.63 -2.57 -2.53 V VOUT = (VOUTP, VOUTN); VDCDC_OUT ≤ VDCDCUV, or VHLDO_OUT ≤ VHLDOUV 8
Output bandwidth BW 290 340 kHz 8
Common-mode transient immunity CMTI 95 155 kV/µs /HGND, GND/ = 2 kV 8
Input offset voltage VOS -50 15 50 µV TA = 25°C, INP = INN = HGND; typ printed ±15 8
Input offset drift TCVOS -0.5 0.1 0.5 uV/°C Input referred; typ printed ±0.1 8
Gain error EG -0.2 0.04 0.2 % TA = 25°C; typ printed ±0.04% 8
Gain error drift TCEG -35 10 35 ppm/°C Box method; typ printed ±10 8
Nonlinearity NL -0.03 0.002 0.03 % Typ printed ±0.002% 8
Low-side supply current IDD 27.5 40 mA No external load on HLDO 9
Low-side supply current IDD 29.5 42 mA 1 mA external load on HLDO 9
DCDC output voltage VDCDC_OUT 3.1 3.5 4.65 V DCDC_OUT to HGND 9
DCDC output undervoltage detection threshold voltage VDCDCUV 2.1 2.25 V DCDC output falling 9
High-side LDO output voltage VHLDO_OUT 3 3.2 3.4 V HLDO to HGND, up to 1 mA external load 9
High-side LDO output undervoltage detection threshold voltage VHLDOUV 2.4 2.6 V HLDO output falling 9
Analog settling time tAS 0.9 1.4 ms VDD step to 3.0 V, to OUTP and OUTN valid, 0.1% settling 9
VINx to VOUTx signal delay (50%, 10%) tD 1.2 1.5 µs Unfiltered output 9
VINx to VOUTx signal delay (50%, 50%) tD 1.6 2.1 µs Unfiltered output 9
VINx to VOUTx signal delay (50%, 90%) tD 2.3 3 µs Unfiltered output 9
Signal-to-noise ratio SNR 77 81 dB VIN = 0.1 VPP, fIN = 1 kHz, BW = 10 kHz, 10 kHz filter 8
Single-ended input resistance RIN 4.75 kΩ INN = HGND 8
Differential input resistance RIND 4.9 kΩ 8
Single-ended input capacitance CIN 4 pF INN = HGND, fIN = 275 kHz 8
Differential input capacitance CIND 2 pF fIN = 275 kHz 8
Nominal gain G 41 V/V 8
Output resistance ROUT 0.2 Ω On OUTP or OUTN 8
Output short-circuit current ISC 14 mA On OUTP or OUTN, sourcing or sinking, INP = INN = HGND, outputs shorted to either GND or VDD 8
Total harmonic distortion THD -85 dB VIN = 0.1 Vpp, fIN = 10 kHz, BW = 100 kHz 8
Output noise 340 µVRMS INP = INN = HGND, fIN = 0 Hz, BW = 100 kHz 8
Signal-to-noise ratio SNR 70 dB VIN = 0.1 VPP, fIN = 10 kHz, BW = 100 kHz, 1 MHz filter 8
Common-mode rejection ratio CMRR -101 dB fIN = 0 Hz, VCM min ≤ VCM ≤ VCM max 8
Power-supply rejection ratio PSRR -120 dB VDD from 3.0 V to 5.5 V, at dc, input referred 8
Power-supply rejection ratio PSRR -108 dB INP = INN = HGND, VDD from 3.0 V to 5.5 V, 10 kHz / 100 mV ripple, input referred 8
VDD analog undervoltage detection threshold VDDUV 2.9 V VDD rising 9
VDD analog undervoltage detection threshold VDDUV 2.8 V VDD falling 9
VDD digital reset threshold VDDPOR 2.5 V VDD rising 9
High-side supply current for auxiliary circuitry IH 1 mA Load connected from HLDO_OUT to HGND, non-switching 9
Output signal rise time tr 1.3 µs 9
Output signal fall time tf 1.3 µs 9
Junction-to-ambient thermal resistance RθJA 73.5 °C/W DWE (SOIC) 16 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 31 °C/W DWE (SOIC) 16 pins 5

CAD (KiCad official)

  • Symbol: AMC3302QDWERQ1
  • Footprint: Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: amc3302qdwerq1-etched.step / amc3302qdwerq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); amc3302qdwerq1.step / amc3302qdwerq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 70a47f2798b4a4e1, retrieved 2026-11-12, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF