# AMC1411QDWLRQ1

**Texas Instruments** · Isolation Amplifiers · SOIC-8

AMC1411QDWLRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | High-side power supply, recommended 3 V to 5.5 V with respect to GND1 (absolute maximum 6.5 V), with decoupling per the Power Supply Recommendations section. |
| 2 | IN | input | Analog input with a specified linear full-scale range of -0.1 V to 2 V with respect to GND1, clipping at 2.516 V. |
| 3 | SHTDN | input | Shutdown input, active high, with an internal pullup resistor (typical 100 kΩ), operated between 0 V and VDD1 with respect to GND1. |
| 4 | GND1 | power_in | High-side analog ground, the reference for VDD1, IN and SHTDN. |
| 5 | GND2 | power_in | Low-side analog ground, the reference for VDD2 and the outputs. |
| 6 | OUTN | output | Inverting analog output, limited to GND2 - 0.5 V to VDD2 + 0.5 V. |
| 7 | OUTP | output | Noninverting analog output, limited to GND2 - 0.5 V to VDD2 + 0.5 V. |
| 8 | VDD2 | power_in | Low-side power supply, recommended 3 V to 5.5 V with respect to GND2 (absolute maximum 6.5 V), with decoupling per the Power Supply Recommendations section. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-side power-supply voltage VDD1 to GND1 | VDD1 | -0.3 |  | 6.5 | V |  | 4 |
| Low-side power-supply voltage VDD2 to GND2 | VDD2 | -0.3 |  | 6.5 | V |  | 4 |
| Input voltage IN to GND1 | IN | -6 |  |  | V | IN to GND1; max printed as VDD1 + 0.5 | 4 |
| Input voltage SHTDN to GND1 | SHTDN | -0.5 |  |  | V | GND1 to SHTDN; max printed as VDD1 + 0.5 | 4 |
| Output voltage OUTP, OUTN to GND2 | VOUT | -0.5 |  |  | V | max printed as VDD2 + 0.5 | 4 |
| Input current, continuous | IIN | -10 |  | 10 | mA | any pin except power-supply pins | 4 |
| Junction temperature | TJ |  |  | 150 | °C |  | 4 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 4 |
| ESD human-body model (HBM) | V(ESD) | -2000 |  | 2000 | V | HBM per AEC Q100-002, ESD classification Level 2 | 4 |
| ESD charged-device model (CDM) | V(ESD) | -1000 |  | 1000 | V | CDM per AEC Q100-011, ESD classification Level C6 | 4 |
| High-side power supply VDD1 to GND1 (recommended) | VDD1 | 3 | 5 | 5.5 | V |  | 4 |
| Low-side power supply VDD2 to GND2 (recommended) | VDD2 | 3 | 3.3 | 5.5 | V |  | 4 |
| Specified linear full-scale voltage IN to GND1 | VFSR | -0.1 |  | 2 | V | IN to GND1 | 4 |
| Digital input voltage SHTDN to GND1 (recommended) | SHTDN | 0 |  |  | V | SHTDN to GND1; max printed as VDD1 | 4 |
| Specified ambient temperature | TA | -40 |  | 125 | °C |  | 4 |
| External clearance CLR | CLR | 14.7 |  |  | mm | shortest pin-to-pin distance through air | 6 |
| External creepage CPG | CPG | 15.7 |  |  | mm | shortest pin-to-pin distance across the package surface | 6 |
| Distance through insulation DTI | DTI | 0.021 |  |  | mm | minimum internal gap of the double insulation | 6 |
| Comparative tracking index CTI | CTI | 600 |  |  | V | DIN EN 60112 (VDE 0303-11); IEC 60112 | 6 |
| Maximum repetitive peak isolation voltage VIORM | VIORM |  |  | 2260 | VPK | at AC voltage | 6 |
| Maximum-rated isolation working voltage VIOWM (AC) | VIOWM |  |  | 1600 | VRMS | at AC voltage (sine wave) | 6 |
| Maximum-rated isolation working voltage VIOWM (DC) | VIOWM |  |  | 2260 | VDC | at DC voltage | 6 |
| Maximum transient isolation voltage VIOTM | VIOTM |  |  | 10600 | VPK | VTEST = VIOTM, t = 60 s (qualification test) | 6 |
| Maximum surge isolation voltage VIOSM | VIOSM |  |  | 8000 | VPK | IEC 60065, 1.2/50-µs waveform, VTEST = 1.6 × VIOSM = 12800 VPK (qualification) | 6 |
| Withstand isolation voltage VISO (UL1577) | VISO |  |  | 7500 | VRMS | VTEST = VISO = 7500 VRMS or 10600 VDC, t = 60 s (qualification) | 6 |
| Input offset voltage | VOS | -1.5 | 0.1 | 1.5 | mV | TA = 25°C | 8 |
| Input offset thermal drift | TCVOS | -10 | 3 | 10 | µV/°C |  | 8 |
| Input bias current | IIB | -15 | 3.5 | 15 | nA | IN = GND1, TA = 25℃ | 8 |
| Gain error | EG | -0.2 | 0.05 | 0.2 | % | TA = 25℃ | 8 |
| Gain error drift | TCEG | -30 | 5 | 30 | ppm/°C |  | 8 |
| Nonlinearity |  | -0.04 | 0.01 | 0.04 | % |  | 8 |
| Output common-mode voltage | VCMout | 1.39 | 1.44 | 1.49 | V |  | 8 |
| Failsafe differential output voltage | VFAILSAFE | -2.6 |  | -2.5 | V | SHTDN = high, or VDD1 undervoltage, or VDD1 missing | 8 |
| Output resistance | ROUT |  |  | 0.2 | Ω | on OUTP or OUTN | 8 |
| Common-mode transient immunity | CMTI | 100 | 150 |  | kV/µs |  | 8 |
| VDD1 undervoltage detection threshold (rising) | VDD1UV | 2.5 | 2.7 | 2.9 | V | VDD1 rising | 9 |
| VDD1 undervoltage detection threshold (falling) | VDD1UV | 2.4 | 2.6 | 2.8 | V | VDD1 falling | 9 |
| VDD2 undervoltage detection threshold (rising) | VDD2UV | 2.2 | 2.45 | 2.65 | V | VDD2 rising | 9 |
| VDD2 undervoltage detection threshold (falling) | VDD2UV | 1.85 | 2 | 2.2 | V | VDD2 falling | 9 |
| Junction-to-ambient thermal resistance | RθJA |  | 63.2 |  | °C/W | DWL (SOIC) 8 pins | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 26.1 |  | °C/W | DWL (SOIC) 8 pins | 5 |
| Junction-to-board thermal resistance | RθJB |  | 28.5 |  | °C/W | DWL (SOIC) 8 pins | 5 |
| Junction-to-top characterization parameter | ψJT |  | 7.8 |  | °C/W | DWL (SOIC) 8 pins | 5 |
| Junction-to-board characterization parameter | ψJB |  | 26.8 |  | °C/W | DWL (SOIC) 8 pins | 5 |

## CAD (KiCad official)

- Symbol: `AMC1411QDWLRQ1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `amc1411qdwlrq1-etched.step` / `amc1411qdwlrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `amc1411qdwlrq1.step` / `amc1411qdwlrq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/amc1411-q1.pdf) (35 pp, sha256 `42cc3619be5bc17d`, retrieved 2026-11-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/amc1411qdwlrq1-datasheet.pdf)