component
AMC1336DWVR
Public Made by Adomby adom
Texas Instruments Pre-ordered Chips, SOIC-8-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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AMC1336DWVR
Texas Instruments · Pre-ordered Chips · SOIC-8-300mil
AMC1336DWVR from Texas Instruments, in a SOIC-8-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD | power_in | Analog (high-side) power supply, 3.0 V to 5.5 V; decoupling per the Power Supply Recommendations section. |
| 2 | AINP | input | Noninverting analog input; absolute analog input voltage on AINP and AINN is AGND - 5 V to AVDD + 0.5 V. |
| 3 | AINN | input | Inverting analog input; absolute analog input voltage on AINP and AINN is AGND - 5 V to AVDD + 0.5 V. |
| 4 | AGND | power_in | Analog (high-side) ground reference. |
| 5 | DGND | power_in | Digital (controller-side) ground reference. |
| 6 | DOUT | output | Modulator bitstream output, updated on the rising edge of the CLKIN clock; the controller or digital filter should latch it on that rising edge. |
| 7 | CLKIN | input | Modulator clock input with internal pulldown (typical 1 MΩ); the clock must be applied continuously for proper device operation. |
| 8 | DVDD | power_in | Digital (controller-side) power supply, 2.7 V to 5.5 V; decoupling per the Power Supply Recommendations section. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8-300mil |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power-supply voltage AVDD to AGND | AVDD | -0.3 | 6.5 | V | AVDD to AGND | 4 | |
| Power-supply voltage DVDD to DGND | DVDD | -0.3 | 6.5 | V | DVDD to DGND | 4 | |
| Analog input voltage on AINP and AINN pins | -5 | V | min = AGND, 5 V; max printed as AVDD + 0.5 V (expression, no fixed number) | 4 | |||
| Digital input voltage on CLKIN pin | -0.5 | V | min = DGND, 0.5 V; max printed as DVDD + 0.5 V (expression) | 4 | |||
| Digital output voltage on DOUT pin | -0.5 | V | min = DGND, 0.5 V; max printed as DVDD + 0.5 V (expression) | 4 | |||
| Input current, continuous, any pin except power-supply pins | -10 | 10 | mA | Continuous | 4 | ||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Electrostatic discharge, human-body model | V(ESD) | -2000 | 2000 | V | HBM per ANSI/ESDA/JEDEC JS-001 | 4 | |
| Electrostatic discharge, charged-device model | V(ESD) | -1000 | 1000 | V | CDM per JESD22-C101 | 4 | |
| Maximum power dissipation (both sides) | PD | 90.75 | mW | AVDD = DVDD = 5.5 V | 5 | ||
| Maximum power dissipation (high-side supply) | PD1 | 57.75 | mW | AVDD = 5.5 V | 5 | ||
| Maximum power dissipation (controller-side supply) | PD2 | 33 | mW | DVDD = 5.5 V | 5 | ||
| High-side supply voltage | AVDD | 3 | 5 | 5.5 | V | AVDD to AGND | 4 |
| Controller-side supply voltage | DVDD | 2.7 | 3.3 | 5.5 | V | DVDD to DGND | 4 |
| Differential input voltage before clipping | VClipping | -1.25 | 1.25 | V | VIN = VAINP, VAINN | 4 | |
| Specified linear differential full-scale voltage | VFSR | -1 | 1 | V | VIN = VAINP, VAINN | 4 | |
| Absolute common-mode input voltage | -2 | V | (VAINP + VAINN)/2 to AGND; max printed as AVDD (expression) | 4 | |||
| Operating common-mode input voltage | VCM | -1.4 | V | 3.0 V ≤ AVDD < 4 V, VAINP = VAINN; max printed as AVDD, 1.4 | 4 | ||
| Operating common-mode input voltage | VCM | -0.8 | V | 3.0 V ≤ AVDD < 4.5 V, /VAINP, VAINN/ = 1.25 V; max printed as AVDD, 2.4 | 4 | ||
| Operating common-mode input voltage | VCM | -1.4 | 2.7 | V | 4 V ≤ AVDD ≤ 5.5 V, VAINP = VAINN | 4 | |
| Operating common-mode input voltage | VCM | -0.8 | 2.1 | V | 4.5 V ≤ AVDD ≤ 5.5 V, /VAINP, VAINN/ = 1.25 V | 4 | |
| Operating ambient temperature | TA | -40 | 25 | 125 | °C | 4 | |
| Single-ended input resistance | RIN | 0.1 | 1.5 | GΩ | AINN = AGND | 7 | |
| Differential input resistance | RIND | 0.16 | 1.5 | GΩ | 7 | ||
| Input bias current | IIB | -10 | 3 | 10 | nA | AINP = AINN = AGND; IIB = (IAINP + IAINN) / 2 | 7 |
| Input offset current | IIO | -5 | 1 | 5 | nA | IIO = IAINP, IAINN | 7 |
| Common-mode transient immunity | CMTI | 80 | 115 | kV/µs | /AGND, DGND/ = 1 kV | 7 | |
| Integral nonlinearity | INL | -4 | 1.6 | 4 | LSB | Resolution: 16 bits | 8 |
| Offset error | EO | -0.5 | 0.03 | 0.5 | mV | Initial, at TA = 25°C, AINP = AINN = AGND | 8 |
| Offset error drift | TCEO | -4 | 0.6 | 4 | µV/°C | 8 | |
| Gain error | EG | -0.25 | 0.02 | 0.25 | % | Initial, at TA = 25°C, VAINP = 1 V or VAINN = -1 V, AINN = AGND | 8 |
| Gain error drift | TCEG | -40 | 20 | 40 | ppm/°C | 8 | |
| Signal-to-noise ratio | SNR | 82 | 87 | dB | VIN = 2 VPP, fIN = 1 kHz | 8 | |
| Signal-to-noise + distortion | SINAD | 79 | 85 | dB | VIN = 2 VPP, fIN = 1 kHz | 8 | |
| Total harmonic distortion | THD | -91 | -80 | dB | VIN = 2 VPP, fIN = 1 kHz | 8 | |
| Spurious-free dynamic range | SFDR | 80 | 92 | dB | VIN = 2 VPP, fIN = 1 kHz | 8 | |
| Low-level input voltage | VIL | -0.3 | V | max printed as 0.3 x DVDD (expression) | 8 | ||
| Output load capacitance | CLOAD | 15 | 30 | pF | fCLKIN = 21 MHz | 8 | |
| Low-level output voltage | VOL | 0.1 | V | IOL = 20 µA | 8 | ||
| Low-level output voltage | VOL | 0.4 | V | IOL = 4 mA | 8 | ||
| AVDD power-on reset threshold voltage | AVDDPOR | 2.4 | 2.6 | 2.8 | V | AVDD falling | 8 |
| High-side supply current | IAVDD | 6.8 | 9 | mA | 3 V ≤ AVDD ≤ 3.6 V | 8 | |
| High-side supply current | IAVDD | 7.8 | 10.5 | mA | 4.5 V ≤ AVDD ≤ 5.5 V | 8 | |
| Controller-side supply current | IDVDD | 3.4 | 5 | mA | 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF | 8 | |
| Controller-side supply current | IDVDD | 3.7 | 6 | mA | 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF | 8 | |
| CLKIN clock frequency | fCLKIN | 9 | 20 | 21 | MHz | 3.0 V ≤ AVDD ≤ 5.5 V | 9 |
| CLKIN clock frequency | fCLKIN | 5 | 20 | 21 | MHz | 4.5 V ≤ AVDD ≤ 5.5 V | 9 |
| CLKIN duty cycle | 40 | 50 | 60 | % | 9 | ||
| DOUT rise time | tr | 2.5 | 6 | ns | 10% to 90%, 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF | 9 | |
| DOUT rise time | tr | 3.2 | 6 | ns | 10% to 90%, 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF | 9 | |
| DOUT fall time | tf | 2.2 | 6 | ns | 10% to 90%, 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF | 9 | |
| DOUT fall time | tf | 2.9 | 6 | ns | 10% to 90%, 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF | 9 | |
| Junction-to-ambient thermal resistance | RθJA | 94 | °C/W | DWV (SOIC) 8 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 36 | °C/W | DWV (SOIC) 8 pins | 5 | ||
| Junction-to-board thermal resistance | RθJB | 46.1 | °C/W | DWV (SOIC) 8 pins | 5 | ||
| Junction-to-top characterization parameter | ψJT | 11.5 | °C/W | DWV (SOIC) 8 pins | 5 | ||
| Junction-to-board characterization parameter | ψJB | 44.4 | °C/W | DWV (SOIC) 8 pins | 5 |
CAD (KiCad official)
- Symbol:
AMC1336DWVR - Footprint:
Package_SO:SOIC-8_7.5x5.85mm_P1.27mm - 3D model: SOIC-8-300mil (KiCad packages3D, STEP)
- 3D model files:
amc1336dwvr-etched.step/amc1336dwvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);amc1336dwvr.step/amc1336dwvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (41 pp, sha256
768e314c2dd0c997, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).