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AMC1204BDWR
Public Made by Adomby adom
Texas Instruments ADCs/DACs - Special Purpose, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAMC1204BDWR
Texas Instruments · ADCs/DACs - Special Purpose · SOIC-16-300mil
AMC1204BDWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD | power_in | High-side (analog) power supply; recommended operating range is 4.5 V to 5.5 V with 5 V nominal, referenced to AGND. |
| 2 | VINP | input | Noninverting analog input; the differential input VINP - VINN is specified over ±250 mV, with linearity and noise ensured only within this range. |
| 3 | VINN | input | Inverting analog input; the differential input VINP - VINN is specified over ±250 mV, with linearity and noise ensured only within this range. |
| 4 | AGND | power_in | High-side ground; internally connected to pin 8 via a low-impedance path, so only one of the two AGND pins must be tied to the ground plane. |
| 5 | NC | unconnected | No internal connection; can be tied to any potential or left unconnected. |
| 6 | NC | unconnected | No internal connection; can be tied to any potential or left unconnected. |
| 7 | NC | unconnected | No internal connection; can be tied to any potential or left unconnected. |
| 8 | AGND | power_in | High-side ground; internally connected to pin 4 via a low-impedance path, so only one of the two AGND pins must be tied to the ground plane. |
| 9 | DGND | power_in | Controller-side (digital) ground, shared with pin 16. |
| 10 | NC | unconnected | No internal connection; can be tied to any potential or left unconnected. |
| 11 | DATA | output | Modulator data output; the bitstream is updated on the falling edge of CLKIN, with tD (delayed falling edge of CLKIN to DATA valid) of 2 ns minimum and 15 ns maximum. |
| 12 | NC | unconnected | No internal connection; can be tied to any potential or left unconnected. |
| 13 | CLKIN | input | Modulator clock input; 5 MHz to 22 MHz input clock frequency (20 MHz typical), with 45.5 ns to 200 ns clock period. |
| 14 | DVDD | power_in | Controller-side (digital) power supply; recommended operating range is 2.7 V to 5.5 V with 3.3 V typical. |
| 15 | NC | unconnected | No internal connection; can be tied to any potential or left unconnected. |
| 16 | DGND | power_in | Controller-side (digital) ground, shared with pin 9. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16-300mil |
| Category | Data Acquisition |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage, AVDD to AGND or DVDD to DGND | -0.3 | 6 | V | AVDD to AGND or DVDD to DGND | 5 | ||
| Input current to any pin except supply pins | -10 | 10 | mA | 5 | |||
| Maximum virtual junction temperature | TJ | 150 | °C | 5 | |||
| Operating ambient temperature | TOA | -40 | 125 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Operating ambient temperature | TA | -40 | 105 | °C | 5 | ||
| High-side (analog) supply voltage | AVDD | 4.5 | 5 | 5.5 | V | 5 | |
| Controller-side (digital) supply voltage | DVDD | 2.7 | 3.3 | 5.5 | V | 5 | |
| Integral linearity error | INL | -8 | 2 | 8 | LSB | TA = -40°C to 85°C | 9 |
| Integral linearity error | INL | -16 | 5 | 16 | LSB | TA = -40°C to 105°C | 9 |
| Differential nonlinearity | DNL | -1 | 1 | LSB | 9 | ||
| Offset error | VOS | -1 | 0.1 | 1 | mV | 9 | |
| Offset error thermal drift | TCVOS | -3.5 | 1 | 3.5 | μV/°C | 9 | |
| Gain error | GERR | -2 | 0.5 | 2 | % | 9 | |
| Gain error thermal drift | TCGERR | -30 | 30 | ppm/°C | 9 | ||
| Full-scale differential voltage input range | FSR | -320 | 320 | mV | VINP, VINN | 9 | |
| Specified full-scale range | -250 | 250 | mV | 9 | |||
| Operating common-mode signal | VCM | -160 | mV | 9 | |||
| Input leakage current | IIL | -10 | 10 | μA | VINP, VINN = ±250 mV | 9 | |
| Input leakage current | IIL | -50 | 50 | μA | VINP, VINN = ±320 mV | 9 | |
| Clock period (external clock) | tCLKIN | 45.5 | 50 | 200 | ns | 9 | |
| Input clock frequency | fCLKIN | 5 | 20 | 22 | MHz | 9 | |
| Clock duty cycle | DutyCLKIN | 40 | 50 | 60 | % | 5 MHz ≤ fCLKIN < 20 MHz | 9 |
| Clock duty cycle | DutyCLKIN | 45 | 50 | 55 | % | 20 MHz ≤ fCLKIN ≤ 22 MHz | 9 |
| Signal-to-noise + distortion | SINAD | 78 | 87 | dB | fIN = 1kHz, TA = -40°C to 85°C | 9 | |
| Signal-to-noise + distortion | SINAD | 70 | 87 | dB | fIN = 1kHz, TA = -40°C to 105°C | 9 | |
| Signal-to-noise ratio | SNR | 84 | 88 | dB | fIN = 1kHz, TA = -40°C to 85°C | 9 | |
| Signal-to-noise ratio | SNR | 83 | 88 | dB | fIN = 1kHz, TA = -40°C to 105°C | 9 | |
| Total harmonic distortion | THD | -96 | -80 | dB | fIN = 1kHz, TA = -40°C to 85°C | 9 | |
| Total harmonic distortion | THD | -96 | -70 | dB | fIN = 1kHz, TA = -40°C to 105°C | 9 | |
| Spurious-free dynamic range | SFDR | 82 | 96 | dB | fIN = 1kHz, TA = -40°C to 85°C | 9 | |
| Spurious-free dynamic range | SFDR | 72 | 96 | dB | fIN = 1kHz, TA = -40°C to 105°C | 9 | |
| Input current | IIN | -10 | 10 | μA | VIN = DVDD to DGND | 9 | |
| Low-level input voltage (CMOS Schmitt-trigger) | VIL | -0.3 | V | DVDD = 4.5V to 5.5V | 9 | ||
| High-level input voltage (LVCMOS) | VIH | 2 | V | DVDD = 2.7 V to 3.6 V | 9 | ||
| Low-level input voltage (LVCMOS) | VIL | -0.3 | 0.8 | V | DVDD = 2.7 V to 3.6 V | 10 | |
| High-side supply voltage | AVDD | 4.5 | 5 | 5.5 | V | 10 | |
| Controller-side supply voltage | DVDD | 2.7 | 3.3 | 5.5 | V | 10 | |
| High-side supply current | IAVDD | 11 | 16 | mA | 4.5 V ≤ AVDD ≤ 5.5 V | 10 | |
| Controller-side supply current | IDVDD | 2 | 4 | mA | 2.7 V ≤ DVDD ≤ 3.6 V | 10 | |
| Controller-side supply current | IDVDD | 2.8 | 5 | mA | 4.5V ≤ DVDD ≤ 5.5 V | 10 | |
| Power dissipation | PD | 61.6 | 102.4 | mW | AVDD = 5.5 V, DVDD = 3.6 V | 10 | |
| CLKIN clock high time | tHIGH | 20 | 25 | 120 | ns | 10 | |
| CLKIN clock low time | tLOW | 20 | 25 | 120 | ns | 10 | |
| Delayed falling edge of CLKIN to DATA valid | tD | 2 | 15 | ns | 10 | ||
| Power-supply rejection ratio | PSRR | 79 | dB | 9 | |||
| Common-mode rejection ratio | CMRR | 108 | dB | VIN from 0 V to 5 V at 0 Hz | 9 | ||
| Common-mode rejection ratio | CMRR | 114 | dB | VIN from 0 V to 5 V at 100 kHz | 9 | ||
| Input capacitance to AGND | CI | 7 | pF | VINP or VINN | 9 | ||
| Differential input capacitance | CID | 3.5 | pF | 9 | |||
| Differential input resistance | RID | 12.5 | kΩ | 9 | |||
| Common-mode transient immunity | CMTI | 15 | kV/μs | 9 | |||
| Input capacitance | CIN | 5 | pF | 9 | |||
| High-level output voltage (CMOS) | VOH | 4.4 | V | DVDD = 4.5 V, IOH = -100 µA | 10 | ||
| Low-level output voltage (CMOS) | VOL | 0.5 | V | DVDD = 4.5 V, IOL = 100 µA | 10 | ||
| Low-level output voltage (LVCMOS) | VOL | 0.1 | V | IOL = 20 µA | 10 | ||
| Low-level output voltage (LVCMOS) | VOL | 0.4 | V | IOL = 4 mA | 10 | ||
| Junction-to-ambient thermal resistance (DW, 16-pin) | RθJA | 78.5 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance (DW, 16-pin) | RθJC(top) | 41.3 | °C/W | 5 | |||
| Junction-to-board thermal resistance (DW, 16-pin) | RθJB | 50.2 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
AMC1204BDWR - Footprint:
Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
amc1204bdwr-etched.step/amc1204bdwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);amc1204bdwr.step/amc1204bdwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (46 pp, sha256
59b4ffc6b2b9478a, retrieved 2026-11-10, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).