component
ALS31313KLEATR-500
Public Made by Adomby adom
Allegro MicroSystems, LLC Magnetic Sensors, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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ALS31313KLEATR-500
Allegro MicroSystems, LLC · Magnetic Sensors · TSSOP-8
ALS31313KLEATR-500 from Allegro MicroSystems, LLC, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply input; bypass VCC to GND with a 0.1 µF capacitor. |
| 2 | ADR0 | input | I2C address select 0; connect a resistive divider to ADR0 to select the device address. |
| 3 | GND | power_in | Ground signal terminal. |
| 4 | INT | output | Interrupt output; see the Application Information section on the interrupt function. |
| 5 | NC | unconnected | Not internally connected; connect to GND. |
| 6 | ADR1 | input | I2C address select 1; connect a resistive divider to ADR1 to select the device address. |
| 7 | SDA | bidirectional | I2C serial data input/output; open-drain. |
| 8 | SCL | input | I2C serial clock input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems, LLC |
| Package | TSSOP-8 |
| Category | Sensors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage, normal operation | VCC | 2.65 | 3 | 3.5 | V | Normal operation | 5 |
| Supply Voltage, EEPROM programming | VCC | 2.8 | 3.5 | V | EEPROM programming | 5 | |
| Supply Current, active | ICC(ACTIVE) | 2 | 3.4 | 3.9 | mA | Sleep = 0, or active state when sleep = 2 | 5 |
| Supply Current, EEPROM programming | ICC(EE) | 6.2 | 6.7 | mA | VCC = VCC(MAX), EEPROM programming occurring | 5 | |
| Linearity Sensitivity Error | ELIN | -1.7 | 1.7 | % | Through full range of BIN; printed typical ±1.7 is mean ±3 sigma | 5 | |
| INT Input Current | IINT(IN) | -1 | 0 | 1 | µA | VIN = 0 V to VCC | 5 |
| INT Pull Up Resistance | RINT(PU) | 2.4 | 10 | kΩ | 5 | ||
| INT Pull Up Voltage | VINT(PU) | 3 | 3.5 | V | 5 | ||
| Address Value 0 Reference | VADDR0 | 0 | 0.1 | × VCC | ADR0, ADR1 | 5 | |
| Address Value 1 Reference | VADDR1 | 0.23 | 0.33 | 0.43 | × VCC | ADR0, ADR1 | 5 |
| Address Value 2 Reference | VADDR2 | 0.57 | 0.67 | 0.77 | × VCC | ADR0, ADR1 | 5 |
| Address Value 3 Reference | VADDR3 | 0.9 | 1 | × VCC | ADR0, ADR1 | 5 | |
| Address Pin Input Resistance | RADD(IN) | 0.8 | 1 | 1.2 | MΩ | ADR0, ADR1 | 5 |
| Bus Free Time Between Stop and Start | tBF | 1.3 | µs | 6 | |||
| Hold Time Start Condition | tSTA(H) | 0.6 | µs | 6 | |||
| Setup Time for Repeated Start Condition | tSTA(S) | 0.6 | µs | 6 | |||
| SCL Low Time | tLOW | 1.3 | µs | 6 | |||
| SCL High Time | tHIGH | 0.6 | µs | 6 | |||
| Data Setup Time | tDAT(S) | 100 | ns | 6 | |||
| Data Hold Time | tDAT(H) | 0 | 900 | ns | 6 | ||
| Setup Time for Stop Condition | tSTO(S) | 0.6 | µs | 6 | |||
| Logic Input Low Level (SDA, SCL) | VI(L) | 0.9 | V | I2C threshold = 0; 3.0 V Compatible Mode | 6 | ||
| Logic Input Low Level (SDA, SCL) | VI(L) | 0.54 | V | I2C threshold = 1; 1.8 V Compatible Mode | 6 | ||
| Logic Input High Level (SDA, SCL) | VI(H) | 2.1 | V | I2C threshold = 0; 3.0 V Compatible Mode | 6 | ||
| Logic Input High Level (SDA, SCL) | VI(H) | 1.26 | V | I2C threshold = 1; 1.8 V Compatible Mode | 6 | ||
| Logic Input Current | II2C(IN) | -1 | 0 | 1 | µA | VIN = 0 V to VCC, RPU = 2.4 kΩ | 6 |
| Output Voltage (SDA Pin) | VO(L) | 0.36 | V | ILOAD = 1.5 mA | 6 | ||
| Clock Frequency (SCL Pin) | fCLK | 400 | 1000 | kHz | 6 | ||
| Output Fall Time (SDA Pin) | tf | 250 | ns | RPU = 2.4 kΩ, CBUS = 100 pF | 6 | ||
| I2C Pull-Up Resistance | RI2C(PU) | 2.4 | 10 | kΩ | 6 | ||
| I2C Pull-Up Voltage | VI2C(PU) | 1.8 | 3 | 3.3 | V | 6 | |
| Total Capacitive Load for SDA and SCL Buses | CBUS | 100 | pF | 6 | |||
| Optimized Sensing Range | BIN | -500 | 500 | G | 7 | ||
| Offset Error X/Y Axes | EOFF(XY) | -24 | 24 | LSB | BIN = 0 G, TA = 25°C | 7 | |
| Offset Error X/Y Axes | EOFF(XY) | -40 | 40 | LSB | BIN = 0 G, TA = 125°C | 7 | |
| Offset Error Z Axis | EOFF(Z) | -24 | 24 | LSB | BIN = 0 G, TA = 25°C | 7 | |
| Offset Error Z Axis | EOFF(Z) | -40 | 40 | LSB | BIN = 0 G, TA = 125°C | 7 | |
| Sensitivity Error X/Y Axes | ESENS(XY) | -4 | 4 | % | TA = 25°C | 7 | |
| Sensitivity Error Z Axis | ESENS(Z) | -4 | 4 | % | TA = 25°C | 7 | |
| Sensitivity Temperature Coefficient | TCSENS | 0.08 | 0.12 | 0.16 | %/°C | NdFeB Magnet, TA = 25°C to 125°C | 7 |
| Sensitivity Temperature Coefficient | TCSENS | 0.04 | 0.12 | 0.2 | %/°C | NdFeB Magnet, TA = 25°C to -40°C | 7 |
| Sensitivity Mismatch Error X Axis to Y Axis | EMATCH(XY) | -5 | 5 | % | 7 | ||
| Sensitivity Mismatch Error X/Y Axes to Z Axis | EMATCH(XYZ) | -5 | 5 | % | 7 | ||
| Offset Error Lifetime Drift | EOFF_DRIFT | -10 | 10 | LSB | 7 | ||
| Sensitivity Error Lifetime Drift | ESENS_DRIFT | -2.6 | 2.6 | % | 7 | ||
| Forward Supply Voltage | VCC | 5.5 | V | 3 | |||
| Reverse Supply Voltage | VRCC | -0.1 | V | 3 | |||
| All Other Pins Forward Voltage | VIN | 5.5 | V | 3 | |||
| All Other Pins Reverse Voltage | VR | -0.1 | V | 3 | |||
| Operating Ambient Temperature | TA | -40 | 125 | °C | Range K | 3 | |
| Maximum Junction Temperature | TJ(MAX) | 165 | °C | 3 | |||
| Storage Temperature | Tstg | -65 | 170 | °C | 3 | ||
| EEPROM Write Count | 1000 | writes | Number of times EEPROM can be written | 3 | |||
| Package Thermal Resistance | RθJA | 145 | °C/W | On 4-layer PCB based on JEDEC standard | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | The ALS31313 is supplied in an 8-pin TSSOP. The package is lead (Pb) free with 100% matte-tin leadframe plating. | 1 |
CAD (KiCad official)
- Symbol:
ALS31313KLEATR-500 - Footprint:
Package_SO:TSSOP-8_4.4x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
als31313kleatr-500-etched.step/als31313kleatr-500-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);als31313kleatr-500.step/als31313kleatr-500.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Allegro MicroSystems, LLC datasheet (25 pp, sha256
610c70ceebd1ff19, retrieved 2026-11-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).