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ALC5651-CG

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Realtek Semicon Audio Interface ICs, QFN-40-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsalc5651-cgfactory-2.0.0extractor-text

Verified ALC5651-CG

by Ray · last 5 Nov 2026 · 1 record · files match
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Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier lcsc, 41 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ALC5651-CG · QFN-40-EP(5x5) · 41 pins
  • ✓copper: 41 copper pads, none touching another net
  • ✓datasheet: all 41 pin names found in the 134-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-cj5pxneu/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 41 pins = 41 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 41 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ alc5651-cg.kicad_sym✓ alc5651-cg.kicad_mod✓ alc5651-cg.step
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Ray Publish 0.1.0 7920c77 4d ago

ALC5651-CG

Realtek Semicon · Audio Interface ICs · QFN-40-EP(5x5)

ALC5651-CG from Realtek Semicon, in a QFN-40-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MICVDD power_in Analog power for MICBIAS, 3.0V to 3.3V (default 3.3V recommended).
2 MICBIAS1 output Bias voltage output for microphone, programmable analog DC output.
3 JD1 input First jack detection pin, multi-level; thresholds Vt1 = 1.485V, Vt2 = 1.925V, Vt3 = 2.7V.
4 IN1P/DMIC_DAT input Single-ended analog input for microphone 1, or digital microphone data input in DMIC mode.
5 IN2P input Positive differential input for microphone 2, or left channel line input.
6 IN2N/JD2 input Negative differential input for microphone 2, or right channel line input; also second jack detection pin with JD threshold VIL = 0.5V, VIH = 1.2V.
7 IN3P input Single-ended input for microphone 3.
8 DACREF power_in Analog power, 1.71V to 1.9V (default 1.8V recommended).
9 AVDD power_in Analog power, 1.71V to 1.9V (default 1.8V recommended).
10 AGND power_in Analog ground.
11 VREF power_in Internal reference voltage, requires a 4.7uF capacitor to analog ground.
12 LOUTL/P output Line output, left channel single-ended output or positive channel differential output.
13 LOUTR/N output Line output, right channel single-ended output or negative channel differential output.
14 CPN2 passive Second charge pump bucket capacitor, 2.2uF capacitor to CPP2.
15 CPP2 passive Second charge pump bucket capacitor, 2.2uF capacitor to CPN2.
16 CPN1 passive First charge pump bucket capacitor, 2.2uF capacitor to CPP1.
17 CPP1 passive First charge pump bucket capacitor, 2.2uF capacitor to CPN1.
18 CPVDD power_in Analog power for headphone charge pump, 1.71V to 1.9V (default 1.8V recommended).
19 CPVPP power_out Charge pump positive voltage output, 2.2uF capacitor to analog ground.
20 CPVREF passive Headphone reference ground.
21 HPO_R output Headphone amplifier output, right channel, analog output.
22 CPVEE power_out Charge pump negative voltage output, 2.2uF capacitor to analog ground.
23 HPO_L output Headphone amplifier output, left channel, analog output.
24 PDM_SDA output PDM data output; can also be configured as GPIO or IRQ output. Output VOL = 0.1DBVDD, VOH = 0.9DBVDD.
25 PDM_SCL output PDM clock output; can also be configured as GPIO or DMIC data input. Output VOL = 0.1DBVDD, VOH = 0.9DBVDD.
26 ADCDAT2 output Second I2S interface serial data output, VOL = 0.1DBVDD, VOH = 0.9DBVDD.
27 DACDAT2 input Second I2S interface serial data input with Schmitt trigger (VIL = 0.35DBVDD, VIH = 0.65DBVDD).
28 LRCK2 bidirectional Second I2S interface synchronous signal; master output VOL/VOH = 0.1/0.9DBVDD, slave Schmitt trigger input (VIL = 0.35DBVDD, VIH = 0.65*DBVDD).
29 BCLK2 bidirectional Second I2S interface serial bit clock; master output VOL/VOH = 0.1/0.9DBVDD, slave Schmitt trigger input (VIL = 0.35DBVDD, VIH = 0.65*DBVDD).
30 ADCDAT1 output First I2S interface serial data output, VOL = 0.1DBVDD, VOH = 0.9DBVDD.
31 DACDAT1 input First I2S interface serial data input with Schmitt trigger (VIL = 0.35DBVDD, VIH = 0.65DBVDD).
32 LRCK1 bidirectional First I2S interface synchronous signal; master output VOL/VOH = 0.1/0.9DBVDD, slave Schmitt trigger input (VIL = 0.35DBVDD, VIH = 0.65*DBVDD).
33 BCLK1 bidirectional First I2S interface serial bit clock; master output VOL/VOH = 0.1/0.9DBVDD, slave Schmitt trigger input (VIL = 0.35DBVDD, VIH = 0.65*DBVDD).
34 MCLK input I2S interface master clock input with Schmitt trigger (VIL = 0.35DBVDD, VIH = 0.65DBVDD).
35 SCL input I2C interface clock input with Schmitt trigger.
36 SDA bidirectional I2C interface serial data, open drain structure.
37 GPIO1/IRQ bidirectional General purpose input/output, or interrupt output; output VOL = 0.1DBVDD, VOH = 0.9DBVDD, input Schmitt trigger.
38 GPIO2/DMIC_SCL bidirectional General purpose input/output, or digital microphone clock output; output VOL = 0.1DBVDD, VOH = 0.9DBVDD, input Schmitt trigger.
39 DBVDD power_in Digital power for digital I/O buffer, 1.71V to 3.3V (default 1.8V recommended).
40 DCVDD power_in Digital core power, 1.1V to 1.3V; may be left open to use internal LDO1 (default), or connected to external 1.2V when LDO1_EN is pulled low.
41 CPGND/DGND power_in Charge pump ground and digital ground, Exposed-Pad.

Key specifications

Parameter Value
Manufacturer Realtek Semicon
Package QFN-40-EP(5x5)
Category Interface ICs
Pins 41

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Digital IO Buffer supply voltage DBVDD -0.3 3.63 V 125
Digital Core supply voltage DCVDD -0.3 1.98 V 125
Analog supply voltage AVDD -0.3 1.98 V 125
Analog reference supply voltage DACREF -0.3 1.98 V 125
Headphone supply voltage CPVDD -0.3 1.98 V 125
Micbias supply voltage MICVDD -0.3 3.63 V 125
Operating Ambient Temperature Ta -25 85 oC 125
Storage Temperature Ts -55 125 oC 125
Digital IO Buffer supply voltage DBVDD 1.71 1.8 3.6 V 125
Digital Core supply voltage DCVDD 1.1 1.2 1.9 V 125
Analog supply voltage AVDD 1.71 1.8 1.9 V 125
Analog reference supply voltage DACREF 1.71 1.8 1.9 V 125
Headphone supply voltage CPVDD 1.71 1.8 1.9 V 125
Micbias supply voltage MICVDD 3 3.3 3.6 V 125
Input Voltage Range VIN -0.3 V DBVDD=1.8V, DCVDD=1.2V, Tambient=40C 125
Output Buffer High Drive Current 0.6 1.8 4.3 mA DBVDD=1.8V, DCVDD=1.2V, Tambient=40C 125
Output Buffer Low Drive Current 0.7 2.1 4.8 mA DBVDD=1.8V, DCVDD=1.2V, Tambient=40C 125
Input Buffer Pull-Up Resistor 55 110 270 K DBVDD=1.8V, DCVDD=1.2V, Tambient=40C 125
Input Buffer Pull-Down Resistor 63 130 300 K DBVDD=1.8V, DCVDD=1.2V, Tambient=40C 125
Power consumption, power down (no clock input) P_power down 50 uW Slave I2S Mode, 24-bit, SR: 44.1KHz; No Clock Input 126
Power consumption, playback (silence) P_playback 5.5 mW Slave I2S Mode, 24-bit, SR: 44.1KHz; Stereo DAC to HP_OUT with 16 Ohm Load, With Clock, play silence 126
Power consumption, playback (Po=1mW/CH) P_playback 13 mW Slave I2S Mode, 24-bit, SR: 44.1KHz; Stereo DAC to HP_OUT with 16 Ohm Load, With Clock, Po=1mW/CH 126
Power consumption, record (LINE_IN to Stereo ADC) P_record 9 mW Slave I2S Mode, 24-bit, SR: 44.1KHz; LINE_IN to Stereo ADC, With Clock 126
Power Down Current, 1.8V IDD_1.8V 10 µA Standard test conditions: Tambient=25C; DBVDD=1.8V; DCVDD=1.2V; AVDD=1.8V; MICVDD=3.3V; CPVDD=1.8V 127
Power Down Current, 3.3V IDDD_3.3V 10 µA Standard test conditions: Tambient=25C; DBVDD=1.8V; DCVDD=1.2V; AVDD=1.8V; MICVDD=3.3V; CPVDD=1.8V 127

CAD (KiCad official)

  • Symbol: ALC5651-CG
  • Footprint: Package_DFN_QFN:QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm
  • 3D model: QFN-40-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: alc5651-cg-etched.step / alc5651-cg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); alc5651-cg.step / alc5651-cg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Realtek Semicon datasheet (134 pp, sha256 149476a2539df222, retrieved 2026-11-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF