# AK5720VT

**Asahi Kasei Microdevices** · Pre-ordered Chips · TSSOP-16

AK5720VT from Asahi Kasei Microdevices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCOM | output | ADC common voltage output at 50%VA, which needs a 0.47µF ceramic capacitor between VCOM and VSS and must not be loaded with any current. |
| 2 | RIN | input | Rch single-ended analog input, which should be left open when unused. |
| 3 | LIN | input | Lch single-ended analog input, which should be left open when unused. |
| 4 | VSS | power_in | Ground pin that must be connected to the analog ground plane. |
| 5 | VA | power_in | Analog power supply of 2.7 to 5.5V (typ. 3 or 5V) that sets the analog input range. |
| 6 | VD | power_in | Digital power supply of 2.7 to 5.5V (typ. 3 or 5V). |
| 7 | GSEL | input | Input gain select where L selects 0dB and H selects +15dB, and it must be fixed to H or L while PDN is H. |
| 8 | REGO | output | Regulator output pin, which will be damaged if a voltage higher than 2.5V is applied to it. |
| 9 | SDTO | output | Audio serial data output that is held low (VSS) in power-down status. |
| 10 | LRCK | bidirectional | Input/output channel clock that is an input in slave mode and fixed to 1fs output in master mode. |
| 11 | MCLK | input | Master clock input that must be provided in master mode unless PDN is L. |
| 12 | BICK | bidirectional | Audio serial data clock that is an input in slave mode and fixed to 64fs output in master mode. |
| 13 | PDN | input | Reset and power-down pin where L resets and powers down the device and H gives normal operation. |
| 14 | DIF/TDMI | input | Audio data format select (L: MSB justified, H: I2S) when CKS is in normal mode, or TDM data input when CKS selects TDM mode. |
| 15 | FSEL | input | Digital filter select where L selects sharp roll-off and H selects short delay sharp roll-off. |
| 16 | CKS | input | Mode select pin set by its connection or external resistor value, with parasitic capacitance that should be less than 20pF. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Asahi Kasei Microdevices |
| Package | TSSOP-16 |
| Category | Interface ICs |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `AK5720VT`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `ak5720vt-etched.step` / `ak5720vt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ak5720vt.step` / `ak5720vt.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Asahi Kasei Microdevices datasheet](docs/ak5720vt-datasheet.pdf) (25 pp, sha256 `4f190254e810cc98`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `off` (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ak5720vt-datasheet.pdf)