AK5554VN

{
  "slug": "ak5554vn",
  "version": "0.1.0",
  "type": "component",
  "description": "Asahi Kasei Microdevices Digital To Analog Converters (DACs), QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "ak5554vn",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ak5554vn.kicad_sym",
    "ak5554vn.kicad_mod",
    "ak5554vn.glb",
    "ak5554vn.step",
    "ak5554vn.lbr",
    "docs/hero.png",
    "docs/ak5554vn-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ak5554vn-hero.glb",
    "ak5554vn-hero.overlay.json",
    "ak5554vn-etched.glb"
  ],
  "component": {
    "mpn": "AK5554VN",
    "manufacturer": "Asahi Kasei Microdevices",
    "package": "QFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/db83eeb1c816d7cfb1d53a02d23ee5bb.pdf",
    "parts": {
      "symbol": "ak5554vn.kicad_sym",
      "footprint": "ak5554vn.kicad_mod",
      "model_3d": "ak5554vn-hero.glb",
      "model_3d_plain": "ak5554vn-etched.glb",
      "model_3d_step": "ak5554vn-etched.step",
      "model_3d_step_plain": "ak5554vn.step",
      "lbr": "ak5554vn.lbr"
    },
    "distributor_links": {
      "lcsc": "C2651627",
      "digikey": "974-1126-2-ND",
      "mouser": "412-AK5554VN"
    },
    "distributor_check": {
      "checked_at": "2026-10-29T02:26:43Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "974-1126-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "412-AK5554VN",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal bonding; connect to AVSS."
      },
      {
        "number": "2",
        "name": "VREFL1",
        "type": "input",
        "description": "ADC low-level voltage reference input; normally connected to AVSS, and VREFL1-2 must be connected to AVSS."
      },
      {
        "number": "3",
        "name": "VREFH1",
        "type": "input",
        "description": "ADC high-level voltage reference input; must not exceed AVDD+0.1 V."
      },
      {
        "number": "4",
        "name": "AIN2N",
        "type": "input",
        "description": "Channel 2 negative analog input (full-differential); AIN inputs must stay between AVSS-0.3 V and AVDD+0.3 V and within 10 mA."
      },
      {
        "number": "5",
        "name": "AIN2P",
        "type": "input",
        "description": "Channel 2 positive analog input (full-differential); AIN inputs must stay between AVSS-0.3 V and AVDD+0.3 V and within 10 mA."
      },
      {
        "number": "6",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog power supply for AIN1-4, 4.5-5.5 V."
      },
      {
        "number": "7",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog ground for AIN1-4."
      },
      {
        "number": "8",
        "name": "AIN3P",
        "type": "input",
        "description": "Channel 3 positive analog input (full-differential); AIN inputs must stay between AVSS-0.3 V and AVDD+0.3 V and within 10 mA."
      },
      {
        "number": "9",
        "name": "AIN3N",
        "type": "input",
        "description": "Channel 3 negative analog input (full-differential); AIN inputs must stay between AVSS-0.3 V and AVDD+0.3 V and within 10 mA."
      },
      {
        "number": "10",
        "name": "VREFH2",
        "type": "input",
        "description": "ADC high-level voltage reference input; must not exceed AVDD+0.1 V."
      },
      {
        "number": "11",
        "name": "VREFL2",
        "type": "input",
        "description": "ADC low-level voltage reference input; must be connected to AVSS."
      },
      {
        "number": "12",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal bonding; connect to AVSS."
      },
      {
        "number": "13",
        "name": "AIN4N",
        "type": "input",
        "description": "Channel 4 negative analog input (full-differential); AIN inputs must stay between AVSS-0.3 V and AVDD+0.3 V and within 10 mA."
      },
      {
        "number": "14",
        "name": "AIN4P",
        "type": "input",
        "description": "Channel 4 positive analog input (full-differential); AIN inputs must stay between AVSS-0.3 V and AVDD+0.3 V and within 10 mA."
      },
      {
        "number": "15",
        "name": "TEST",
        "type": "input",
        "description": "TEST enable pin; connect to DVSS in PCM and DSD modes per the unused-pin table."
      },
      {
        "number": "16",
        "name": "MCLK",
        "type": "input",
        "description": "Master clock input."
      },
      {
        "number": "17",
        "name": "TVDD",
        "type": "power_in",
        "description": "Digital I/O buffer and LDO power supply, 1.7-1.98 V when LDOE is L or 3.0-3.6 V when LDOE is H."
      },
      {
        "number": "18",
        "name": "DVSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "19",
        "name": "VDD18",
        "type": "power_in",
        "description": "Digital core power supply, 1.7-1.98 V when LDOE is L; when LDOE is H this pin is the LDO stabilization capacitor connection and cannot supply external circuits."
      },
      {
        "number": "20",
        "name": "PDN",
        "type": "input",
        "description": "Reset and power-down pin: L resets and powers down the device, H selects normal operation."
      },
      {
        "number": "21",
        "name": "PW0",
        "type": "input",
        "description": "Power management pin and channel summation select pin 1."
      },
      {
        "number": "22",
        "name": "PW1",
        "type": "input",
        "description": "Power management pin and channel summation select pin 2."
      },
      {
        "number": "23",
        "name": "PW2",
        "type": "input",
        "description": "Power management pin and channel summation select pin 3; also used with PDN for reset."
      },
      {
        "number": "24",
        "name": "MSN",
        "type": "input",
        "description": "Master/slave select pin."
      },
      {
        "number": "25",
        "name": "BICK/DCLK",
        "type": "bidirectional",
        "description": "Audio serial bit clock: input in PCM slave mode, output in PCM master mode (100 kOhm internal pull-down); DSD clock output in DSD mode."
      },
      {
        "number": "26",
        "name": "LRCK/DSDOL1",
        "type": "bidirectional",
        "description": "Channel clock: input in PCM slave mode, output in PCM master mode (100 kOhm internal pull-down); audio serial data output for AIN1 in DSD mode."
      },
      {
        "number": "27",
        "name": "TDMIN/DSDOR1",
        "type": "input",
        "description": "TDM data input in PCM mode (100 kOhm internal pull-down); audio serial data output for AIN2 in DSD mode."
      },
      {
        "number": "28",
        "name": "SDTO1/DSDOL2",
        "type": "output",
        "description": "Audio serial data output for AIN1 and AIN2 in PCM mode; audio serial data output for AIN3 in DSD mode; output is Low when powered down."
      },
      {
        "number": "29",
        "name": "SDTO2/DSDOR2",
        "type": "output",
        "description": "Audio serial data output for AIN3 and AIN4 in PCM mode; audio serial data output for AIN4 in DSD mode; output is Low when powered down."
      },
      {
        "number": "30",
        "name": "OVF",
        "type": "output",
        "description": "Analog input overflow flag output, goes High when any channel overflows (more than -0.3 dBFS in PCM mode)."
      },
      {
        "number": "31",
        "name": "CKS0/SDA/CDTI",
        "type": "bidirectional",
        "description": "Clock mode select pin; serves as control data I/O (SDA) in I2C mode and control data input (CDTI) in 3-wire serial mode."
      },
      {
        "number": "32",
        "name": "CKS1/CAD0_I2C/CSN",
        "type": "input",
        "description": "Clock mode select pin; serves as chip address 0 (CAD0_I2C) in I2C mode and chip select (CSN) in 3-wire serial mode."
      },
      {
        "number": "33",
        "name": "CKS2/SCL/CCLK",
        "type": "input",
        "description": "Clock mode select pin; serves as control data clock (SCL) in I2C mode and control data clock (CCLK) in 3-wire serial mode."
      },
      {
        "number": "34",
        "name": "CKS3/CAD1",
        "type": "input",
        "description": "Clock mode select pin; serves as chip address 1 (CAD1) in I2C or 3-wire serial mode."
      },
      {
        "number": "35",
        "name": "SLOW/DCKB",
        "type": "input",
        "description": "Slow roll-off digital filter select pin in PCM mode; polarity of DCLK pin in DSD mode."
      },
      {
        "number": "36",
        "name": "SD/PMOD",
        "type": "input",
        "description": "Short delay digital filter select pin in PCM mode; DSD phase modulation mode select pin in DSD mode."
      },
      {
        "number": "37",
        "name": "DIF0/DSDSEL0",
        "type": "input",
        "description": "Audio data format select in PCM mode (L: MSB justified, H: I2S); DSD sampling rate control in DSD mode."
      },
      {
        "number": "38",
        "name": "DIF1/DSDSEL1",
        "type": "input",
        "description": "Audio data format select in PCM mode (L: 24-bit, H: 32-bit); DSD sampling rate control in DSD mode."
      },
      {
        "number": "39",
        "name": "TDM0",
        "type": "input",
        "description": "TDM interface format select pin; must be fixed to L when using DSD mode."
      },
      {
        "number": "40",
        "name": "TDM1",
        "type": "input",
        "description": "TDM interface format select pin; must be fixed to L when using DSD mode."
      },
      {
        "number": "41",
        "name": "PSN/CAD0_SPI",
        "type": "input",
        "description": "Control mode select pin when I2C pin is H (L: I2C serial control, H: parallel control); chip address 0 for 3-wire serial control when I2C pin is L."
      },
      {
        "number": "42",
        "name": "I2C",
        "type": "input",
        "description": "Control mode select pin: L selects 3-wire serial control; H selects I2C serial control or parallel control."
      },
      {
        "number": "43",
        "name": "DP",
        "type": "input",
        "description": "DSD mode enable pin: L selects PCM mode, H selects DSD mode."
      },
      {
        "number": "44",
        "name": "HPFE/DCKS",
        "type": "input",
        "description": "High-pass filter enable pin in PCM mode (L: disable, H: enable); master clock frequency select in DSD mode."
      },
      {
        "number": "45",
        "name": "LDOE",
        "type": "input",
        "description": "LDO enable pin: L disables the internal LDO, H enables it; pulled down internally by 100 kOhm."
      },
      {
        "number": "46",
        "name": "ODP",
        "type": "input",
        "description": "Optimal data placement mode enable pin."
      },
      {
        "number": "47",
        "name": "AIN1P",
        "type": "input",
        "description": "Channel 1 positive analog input (full-differential); AIN inputs must stay between AVSS-0.3 V and AVDD+0.3 V and within 10 mA."
      },
      {
        "number": "48",
        "name": "AIN1N",
        "type": "input",
        "description": "Channel 1 negative analog input (full-differential); AIN inputs must stay between AVSS-0.3 V and AVDD+0.3 V and within 10 mA."
      },
      {
        "number": "49",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: VDD18 has two functions: digital core supply input when LDOE is L, and LDO stabilization capacitor o; BICK and LRCK are inputs in slave mode and outputs in master mode, and BICK/LRCK also carry DCLK/DSD; TDMIN/DSDOR1 is an input in PCM mode and an output in DSD mode. Typed as input for the PCM function.",
          "exposed pad 49 added from the footprint"
        ],
        "pages_sent": 20,
        "cost_usd": 0.1042,
        "at": "2026-10-29T02:26:24"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/db83eeb1c816d7cfb1d53a02d23ee5bb.pdf",
        "pages": 70,
        "sha256": "5f7821306c7a7ea1",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ak5554vn.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ak5554vn-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e609f78612ac4d33c2d4ab7fa9a3d98d9b183d5af7558c7cef21bc75a44d8858",
        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "48-pin QFN",
      "source_page": 68,
      "D": {
        "nom_mm": 7.0,
        "range_mm": [
          null,
          null
        ]
      },
      "E1": {
        "nom_mm": 7.0,
        "range_mm": [
          null,
          null
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 0.85,
        "range_mm": [
          null,
          null
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "ak5554vn.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}