AK5538VN

{
  "slug": "ak5538vn",
  "version": "0.1.0",
  "type": "component",
  "description": "Asahi Kasei Microdevices Analog To Digital Converters (ADCs), QFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "ak5538vn",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ak5538vn.kicad_sym",
    "ak5538vn.kicad_mod",
    "ak5538vn.glb",
    "ak5538vn.step",
    "ak5538vn.lbr",
    "docs/hero.png",
    "docs/ak5538vn-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ak5538vn-hero.glb",
    "ak5538vn-hero.overlay.json",
    "ak5538vn-etched.glb"
  ],
  "component": {
    "mpn": "AK5538VN",
    "manufacturer": "Asahi Kasei Microdevices",
    "package": "QFN-64-EP(9x9)",
    "pin_count": 65,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Analog To Digital Converters (ADCs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/b1d4a8aef4551cb886f4efbc2bcfb35a.pdf",
    "parts": {
      "symbol": "ak5538vn.kicad_sym",
      "footprint": "ak5538vn.kicad_mod",
      "model_3d": "ak5538vn-hero.glb",
      "model_3d_plain": "ak5538vn-etched.glb",
      "model_3d_step": "ak5538vn-etched.step",
      "model_3d_step_plain": "ak5538vn.step",
      "lbr": "ak5538vn.lbr"
    },
    "distributor_links": {
      "lcsc": "C2667106",
      "digikey": "974-1124-2-ND",
      "mouser": "412-AK5538VN"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T17:07:29Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "974-1124-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "412-AK5538VN",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "AVSS1",
        "type": "power_in",
        "description": "Analog ground pin for AIN1-4, which must be connected to the same analog ground plane as DVSS and AVSS2."
      },
      {
        "number": "2",
        "name": "AVDD1",
        "type": "power_in",
        "description": "Analog power supply pin for AIN1-4, specified at 3.0-3.6 V."
      },
      {
        "number": "3",
        "name": "AIN3P",
        "type": "input",
        "description": "Channel 3 positive differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "4",
        "name": "AIN3N",
        "type": "input",
        "description": "Channel 3 negative differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "5",
        "name": "VREFL2",
        "type": "input",
        "description": "ADC low-level voltage reference input for channels 3-4, normally connected to AVSS."
      },
      {
        "number": "6",
        "name": "VREFH2",
        "type": "input",
        "description": "ADC high-level voltage reference input for channels 3-4, specified at 3.0-3.3-3.6 V and not to exceed AVDD+0.1 V."
      },
      {
        "number": "7",
        "name": "AIN4N",
        "type": "input",
        "description": "Channel 4 negative differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "8",
        "name": "AIN4P",
        "type": "input",
        "description": "Channel 4 positive differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "9",
        "name": "AIN5P",
        "type": "input",
        "description": "Channel 5 positive differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "10",
        "name": "AIN5N",
        "type": "input",
        "description": "Channel 5 negative differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "11",
        "name": "VREFH3",
        "type": "input",
        "description": "ADC high-level voltage reference input for channels 5-6, specified at 3.0-3.3-3.6 V and not to exceed AVDD+0.1 V."
      },
      {
        "number": "12",
        "name": "VREFL3",
        "type": "input",
        "description": "ADC low-level voltage reference input for channels 5-6, normally connected to AVSS."
      },
      {
        "number": "13",
        "name": "AIN6N",
        "type": "input",
        "description": "Channel 6 negative differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "14",
        "name": "AIN6P",
        "type": "input",
        "description": "Channel 6 positive differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "15",
        "name": "AVDD2",
        "type": "power_in",
        "description": "Analog power supply pin for AIN5-8, specified at 3.0-3.6 V."
      },
      {
        "number": "16",
        "name": "AVSS2",
        "type": "power_in",
        "description": "Analog ground pin for AIN5-8, which must be connected to the same analog ground plane as DVSS and AVSS1."
      },
      {
        "number": "17",
        "name": "AIN7P",
        "type": "input",
        "description": "Channel 7 positive differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "18",
        "name": "AIN7N",
        "type": "input",
        "description": "Channel 7 negative differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "19",
        "name": "VREFH4",
        "type": "input",
        "description": "ADC high-level voltage reference input for channels 7-8, specified at 3.0-3.3-3.6 V and not to exceed AVDD+0.1 V."
      },
      {
        "number": "20",
        "name": "VREFL4",
        "type": "input",
        "description": "ADC low-level voltage reference input for channels 7-8, normally connected to AVSS."
      },
      {
        "number": "21",
        "name": "AIN8N",
        "type": "input",
        "description": "Channel 8 negative differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "22",
        "name": "AIN8P",
        "type": "input",
        "description": "Channel 8 positive differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "23",
        "name": "TEST",
        "type": "input",
        "description": "Test enable pin with an internal 100 kΩ pull-down; it must be connected to DVSS in normal use."
      },
      {
        "number": "24",
        "name": "MCLK",
        "type": "input",
        "description": "Master clock input pin for the device."
      },
      {
        "number": "25",
        "name": "TVDD",
        "type": "power_in",
        "description": "Digital I/O buffer and LDO power supply, 1.7-1.98 V when LDOE is L or 3.0-3.6 V when LDOE is H; TVDD must not exceed VDD18±0.1 V when LDOE is L."
      },
      {
        "number": "26",
        "name": "DVSS",
        "type": "power_in",
        "description": "Digital ground pin, which must be connected to the same analog ground plane as AVSS1/2."
      },
      {
        "number": "27",
        "name": "VDD18",
        "type": "power_in",
        "description": "Digital core power supply, 1.7-1.98 V when LDOE is L; when LDOE is H this pin is the LDO stabilization capacitor connection and cannot supply external circuits."
      },
      {
        "number": "28",
        "name": "PDN",
        "type": "input",
        "description": "Reset and power-down pin: L resets the device and powers it down, H enables normal operation."
      },
      {
        "number": "29",
        "name": "PW0",
        "type": "input",
        "description": "Power management pin that also selects channel summation mode."
      },
      {
        "number": "30",
        "name": "PW1",
        "type": "input",
        "description": "Power management pin that also selects channel summation mode."
      },
      {
        "number": "31",
        "name": "PW2",
        "type": "input",
        "description": "Power management pin that also selects channel summation mode."
      },
      {
        "number": "32",
        "name": "MSN",
        "type": "input",
        "description": "Master/slave select: L selects slave mode and H selects master mode."
      },
      {
        "number": "33",
        "name": "BICK/DCLK",
        "type": "bidirectional",
        "description": "In PCM slave mode this is the audio serial data clock input, in PCM master mode it is the serial data clock output, and in DSD mode it is the DSD clock output; it has an internal 100 kΩ pull-down."
      },
      {
        "number": "34",
        "name": "LRCK/DSDOL1",
        "type": "bidirectional",
        "description": "In PCM slave mode this is the channel clock input, in PCM master mode it is the channel clock output, and in DSD mode it outputs the AIN1 DSD serial data; it has an internal 100 kΩ pull-down."
      },
      {
        "number": "35",
        "name": "TDMIN/DSDOR1",
        "type": "bidirectional",
        "description": "In PCM mode this is the TDM data input with an internal 100 kΩ pull-down, and in DSD mode it outputs the AIN2 DSD serial data."
      },
      {
        "number": "36",
        "name": "SDTO1/DSDOL2",
        "type": "output",
        "description": "In PCM mode this outputs serial data for AIN1 and AIN2, and in DSD mode it outputs AIN3 DSD data; it is Low when powered down."
      },
      {
        "number": "37",
        "name": "SDTO2/DSDOR2",
        "type": "output",
        "description": "In PCM mode this outputs serial data for AIN3 and AIN4, and in DSD mode it outputs AIN4 DSD data; it is Low when powered down."
      },
      {
        "number": "38",
        "name": "SDTO3/DSDOL3",
        "type": "output",
        "description": "In PCM mode this outputs serial data for AIN5 and AIN6, and in DSD mode it outputs AIN5 DSD data; it is Low when powered down."
      },
      {
        "number": "39",
        "name": "SDTO4/DSDOR3",
        "type": "output",
        "description": "In PCM mode this outputs serial data for AIN7 and AIN8, and in DSD mode it outputs AIN6 DSD data; it is Low when powered down."
      },
      {
        "number": "40",
        "name": "DSDOL4",
        "type": "output",
        "description": "DSD serial data output for AIN7; it is Low when powered down."
      },
      {
        "number": "41",
        "name": "DSDOR4",
        "type": "output",
        "description": "DSD serial data output for AIN8; it is Low when powered down."
      },
      {
        "number": "42",
        "name": "OVF",
        "type": "output",
        "description": "Analog input overflow flag output that goes High when any of AIN1-8 exceeds 0.3 dBFS in PCM mode, or when a DSD modulator overflows in DSD mode."
      },
      {
        "number": "43",
        "name": "CKS0/SDA/CDTI",
        "type": "bidirectional",
        "description": "Clock mode select input in general use, serving as the I2C control data I/O (SDA) in I2C mode or the control data input (CDTI) in 3-wire mode."
      },
      {
        "number": "44",
        "name": "CKS1/CAD0_I2C/CSN",
        "type": "input",
        "description": "Clock mode select input in general use, serving as chip address 0 in I2C mode or chip select (CSN) in 3-wire mode."
      },
      {
        "number": "45",
        "name": "CKS2/SCL/CCLK",
        "type": "input",
        "description": "Clock mode select input in general use, serving as the I2C control clock (SCL) in I2C mode or the 3-wire control clock (CCLK) in 3-wire mode."
      },
      {
        "number": "46",
        "name": "CKS3/CAD1",
        "type": "input",
        "description": "Clock mode select input in general use, serving as chip address 1 in I2C or 3-wire control mode."
      },
      {
        "number": "47",
        "name": "SLOW/DCKB",
        "type": "input",
        "description": "Selects the slow roll-off digital filter in PCM mode, or sets the DCLK polarity in DSD mode."
      },
      {
        "number": "48",
        "name": "SD/PMOD",
        "type": "input",
        "description": "Selects the short-delay digital filter in PCM mode, or enables DSD phase modulation mode in DSD mode."
      },
      {
        "number": "49",
        "name": "DIF0/DSDSEL0",
        "type": "input",
        "description": "In PCM mode selects the audio data format (L: MSB justified, H: I2S); in DSD mode sets the DSD sampling rate control."
      },
      {
        "number": "50",
        "name": "DIF1/DSDSEL1",
        "type": "input",
        "description": "In PCM mode selects the word length (L: 24-bit, H: 32-bit); in DSD mode sets the DSD sampling rate control."
      },
      {
        "number": "51",
        "name": "TDM0",
        "type": "input",
        "description": "TDM interface format select pin, which must be fixed to L when using DSD mode."
      },
      {
        "number": "52",
        "name": "TDM1",
        "type": "input",
        "description": "TDM interface format select pin, which must be fixed to L when using DSD mode."
      },
      {
        "number": "53",
        "name": "PSN/CAD0_SPI",
        "type": "input",
        "description": "With I2C pin High it selects control mode (L: I2C bus serial control, H: parallel control); with I2C pin Low it serves as chip address 0 for 3-wire control."
      },
      {
        "number": "54",
        "name": "I2C",
        "type": "input",
        "description": "Control mode select: L selects 3-wire serial control and H selects I2C bus or parallel control."
      },
      {
        "number": "55",
        "name": "DP",
        "type": "input",
        "description": "DSD mode enable: L selects PCM mode and H selects DSD mode."
      },
      {
        "number": "56",
        "name": "DCKS/HPFE",
        "type": "input",
        "description": "High-pass filter enable (L: disable, H: enable) in PCM mode, and master clock frequency select (DCKS) in DSD mode."
      },
      {
        "number": "57",
        "name": "LDOE",
        "type": "input",
        "description": "LDO enable: L disables and H enables the internal LDO; the pin has an internal 100 kΩ pull-down and all digital inputs must not float."
      },
      {
        "number": "58",
        "name": "ODP",
        "type": "input",
        "description": "Optimal data placement mode select pin."
      },
      {
        "number": "59",
        "name": "AIN1P",
        "type": "input",
        "description": "Channel 1 positive differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "60",
        "name": "AIN1N",
        "type": "input",
        "description": "Channel 1 negative differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "61",
        "name": "VREFL1",
        "type": "input",
        "description": "ADC low-level voltage reference input for channels 1-2, normally connected to AVSS."
      },
      {
        "number": "62",
        "name": "VREFH1",
        "type": "input",
        "description": "ADC high-level voltage reference input for channels 1-2, specified at 3.0-3.3-3.6 V and not to exceed AVDD+0.1 V."
      },
      {
        "number": "63",
        "name": "AIN2N",
        "type": "input",
        "description": "Channel 2 negative differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "64",
        "name": "AIN2P",
        "type": "input",
        "description": "Channel 2 positive differential analog input; full-scale is nominally ±1.85 V (typ) and inputs must not exceed AVDD+0.3 V or AVSS-0.3 V."
      },
      {
        "number": "65",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Multi-function pins are listed with more than one I/O direction in the datasheet (for example the se; VDD18 (pin 27) is an input supply when LDOE is L and an LDO stabilization capacitor connection (outp; The exposed pad on the back face of the QFN package is not given a pin number in the pin table. The ",
          "exposed pad 65 added from the footprint"
        ],
        "pages_sent": 20,
        "cost_usd": 0.1188,
        "at": "2026-10-30T17:07:09"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/b1d4a8aef4551cb886f4efbc2bcfb35a.pdf",
        "pages": 70,
        "sha256": "731b6e9f0f30cc31",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 65,
        "described": 65,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ak5538vn.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          0.75
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ak5538vn-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          0.75
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ee21d1b17973e2d4bfd93075388877e6655c06c1de1b373bb4630194ad1a4153",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "64-pin QFN",
      "source_page": 68,
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 0.85,
        "range_mm": [
          null,
          0.85
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "ak5538vn.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}