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AK5522VN

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Asahi Kasei Microdevices Analog To Digital Converters (ADCs), VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata convertersak5522vnfactory-2.0.0extractor-text

Verified AK5522VN

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier lcsc, 25 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AK5522VN · VQFN-24-EP(4x4) · 25 pins
  • ✓copper: 25 copper pads, none touching another net
  • ✓datasheet: all 25 pin names found in the 84-page datasheet
  • ✓distributor: lcsc C2670141, digikey 974-1164-2-ND, mouser 412-AK5522VN
  • ✓family: QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-hl6hqfrw/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 25 pins = 25 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 25 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ak5522vn.kicad_sym✓ ak5522vn.kicad_mod✓ ak5522vn.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers ak5522vn: viewers · Ray 4d ago
ak5522vn-etched.glb Publish 0.1.0 · Ray 4d ago
ak5522vn-etched.step ak5522vn: factory component page (tier=lcsc) · Ray 4d ago
ak5522vn-hero.glb ak5522vn: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
ak5522vn-hero.overlay.json Publish 0.1.0 · Ray 4d ago
ak5522vn.glb Publish 0.1.0 · Ray 4d ago
ak5522vn.kicad_mod Publish 0.1.0 · Ray 4d ago
ak5522vn.kicad_sym Publish 0.1.0 · Ray 4d ago
ak5522vn.lbr Publish 0.1.0 · Ray 4d ago
ak5522vn.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier lcsc, 25 pins · Ray 4d ago

AK5522VN

Asahi Kasei Microdevices · Analog To Digital Converters (ADCs) · VQFN-24-EP(4x4)

AK5522VN from Asahi Kasei Microdevices, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CKS3/SDA bidirectional Clock mode select pin in parallel control mode, and control data I/O pin for the I2C bus in serial control mode.
2 PDN input Reset and power-down pin; setting it to L enters power-down mode and resets the digital filters.
3 CKS1 input Clock mode select pin in parallel control mode; connect to DVSS in serial control mode.
4 SD input Digital filter select pin in parallel control mode: L selects Sharp Roll-Off, H selects Short Delay Sharp Roll-Off.
5 PSN input Control mode select pin: L selects serial control mode, H selects parallel control mode.
6 DIF input Data format select pin in parallel control mode: L selects MSB justified, H selects I2S compatible; connect to DVSS in serial control mode.
7 LINP input L channel positive signal input pin; leave open when unused.
8 LINN input L channel negative signal input pin; leave open when unused.
9 RINN input R channel negative signal input pin; leave open when unused.
10 RINP input R channel positive signal input pin; leave open when unused.
11 VREF power_in Internal reference voltage decoupling pin; decouple to AVSS with a 1µF ±50% capacitor.
12 LOOP output PLL loop filter connect pin; connect to AVSS with a 0.01µF ±50% capacitor.
13 AVSS power_in Analog ground pin.
14 AVDD power_in Analog power supply pin; 3.0 - 3.6V or 4.5 - 5.5V.
15 REGAO output Regulator output for external DAC: 3.3V typ. when AVDD is 4.5 - 5.5V, low when AVDD is 3.0 - 3.6V; connect to AVSS with a 10µF ±50% capacitor and decouple the external DAC supply with 10µF and 0.1µF in parallel.
16 DVSS power_in Digital ground pin.
17 DVDD power_in Digital power supply pin; 3.0 - 3.6V (or 1.7 - 1.98V with REGDO tied to DVDD).
18 MCLK bidirectional Master clock input in EXT Master, EXT Slave and PLL Master modes, or master clock output in PLL Slave mode; pulled down to DVSS internally with 100kΩ.
19 REGDO bidirectional Regulator stabilization capacitor connect pin: at DVDD 3.0 - 3.6V it outputs 1.8V typ. and needs a 1µF ±50% capacitor to DVSS; at DVDD 1.7 - 1.98V connect it to DVDD.
20 LRCK bidirectional Channel clock input in slave mode or channel clock output in master mode; pulled down to DVSS internally with 100kΩ.
21 BICK bidirectional Audio serial data clock input in slave mode or output in master mode; pulled down to DVSS internally with 100kΩ.
22 SDTO output Audio serial data output pin.
23 CKS0/TDMI input Clock mode select pin in parallel control mode, and TDM data input pin in TDM mode (connect to DVSS when not used in TDM mode).
24 CKS2/SCL input Clock mode select pin in parallel control mode, and control clock input for the I2C bus in serial control mode.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Asahi Kasei Microdevices
Package VQFN-24-EP(4x4)
Category Data Converters
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog supply (AVDD pin) VA -0.3 6 V AVSS=DVSS=0V 7
Digital supply (DVDD pin) VD -0.3 6 V AVSS=DVSS=0V 7
Digital regulator output (REGDO pin) VRD -0.3 2.5 V AVSS=DVSS=0V 7
Input current (any pin except supplies) IIN 10 mA 7
Digital input voltage VIND -0.3 V Note 5 pins; max is lower of VD+0.3 or 6.0 V (Note 6) 7
Ambient temperature (power applied) Ta -40 105 C Power applied 7
Storage temperature Tstg -65 150 C 7
Analog supply (AVDD) VA 4.5 5 5.5 V AVSS=DVSS=0V 7
Analog supply (AVDD) VA 3 3.3 3.6 V AVSS=DVSS=0V 7
Digital supply (DVDD) VD 3 3.3 3.6 V Using internal regulator 7
Digital supply (DVDD) VD 1.7 1.8 1.98 V Not using internal regulator 7
Digital regulator output (REGDO) VRD 1.7 1.8 1.98 V Not using internal regulator 7
Input Voltage (ADC full-scale) 2 2.1 2.2 Vrms Analog Power Supply=5.0V, Ta=25C, DVDD=3.3V; Gain=0dB (Note 8) 8
S/(N+D) fs=48kHz BW=20kHz 1dBFS 92 98 dB Analog Power Supply=5.0V, Ta=25C, DVDD=3.3V; fs=48kHz; BW=20kHz; 1dBFS 8
Dynamic Range (60dBFS, A-weighted) 103 108 dB Analog Power Supply=5.0V, Ta=25C, DVDD=3.3V; fs=48kHz; BW=20kHz 8
Dynamic Range (60dBFS) 98 103 dB Analog Power Supply=5.0V, Ta=25C, DVDD=3.3V; fs=96kHz, 192kHz; BW=40kHz 8
S/N (A-weighted) 103 108 dB Analog Power Supply=5.0V, Ta=25C, DVDD=3.3V; fs=48kHz; BW=20kHz 8
S/N 98 103 dB Analog Power Supply=5.0V, Ta=25C, DVDD=3.3V; fs=96kHz, 192kHz; BW=40kHz 8
Input Resistance, Full Differential 5 8.5 k Analog Power Supply=5.0V, Ta=25C; Gain=+12dB 8
Input Resistance, Full Differential 10 20.7 k Analog Power Supply=5.0V, Ta=25C; Gain=0dB 8
Input Resistance, Full Differential 10 23.8 k Analog Power Supply=5.0V, Ta=25C; Gain=3dB 8
Input Resistance, Pseudo Differential / Single End 5 14 k Analog Power Supply=5.0V, Ta=25C; Gain=+12dB 8
Input Resistance, Pseudo Differential / Single End 10 27.3 k Analog Power Supply=5.0V, Ta=25C; Gain=0dB 8
Input Resistance, Pseudo Differential / Single End 10 30.3 k Analog Power Supply=5.0V, Ta=25C; Gain=3dB 8
Interchannel Isolation 110 120 dB Analog Power Supply=5.0V, Ta=25C 8
Interchannel Gain Mismatch 0 0.5 dB Analog Power Supply=5.0V, Ta=25C 8
Common Mode Rejection Ratio (CMRR) 55 80 dB Analog Power Supply=5.0V, Ta=25C 8
VREF pin Output Voltage 3.72 3.92 4.12 V Analog Power Supply=5.0V, Ta=25C 8
Regulator for External DAC Output Voltage 3 3.3 3.6 V Analog Power Supply=5.0V, Ta=25C 8
Regulator for External DAC Output Current 15 mA Analog Power Supply=5.0V, Ta=25C 8
Power Supply Current, Normal Operation AVDD 12 18 mA Analog Power Supply=5.0V; PDN pin = H (Note 10: PLL master mode, PLL3-0 = 0101b) 8
Power Supply Current, Normal Operation DVDD (fs=48kHz) 4.7 8 mA Analog Power Supply=5.0V; PDN pin = H (Note 10); fs=48kHz 8
Power Supply Current, Normal Operation DVDD (fs=96kHz) 8.1 13 mA Analog Power Supply=5.0V; PDN pin = H (Note 10); fs=96kHz 8
Power Supply Current, Normal Operation DVDD (fs=192kHz) 7.6 12 mA Analog Power Supply=5.0V; PDN pin = H (Note 10); fs=192kHz 8
Power-down Current, AVDD+DVDD 0 10 A PDN pin = L (Note 11: all digital inputs fixed to DVDD or DVSS) 8
Input Voltage (ADC full-scale) 2 2.1 2.2 Vrms Analog Power Supply=3.3V, Ta=25C; Gain=0dB (Note 8) 9
S/(N+D) fs=48kHz BW=20kHz 1dBFS 87 93 dB Analog Power Supply=3.3V, Ta=25C; fs=48kHz; BW=20kHz; 1dBFS 9
Dynamic Range (60dBFS, A-weighted) 99 104 dB Analog Power Supply=3.3V, Ta=25C; fs=48kHz; BW=20kHz 9
Dynamic Range (60dBFS) 94 99 dB Analog Power Supply=3.3V, Ta=25C; fs=96kHz, 192kHz; BW=40kHz 9
S/N (A-weighted) 99 104 dB Analog Power Supply=3.3V, Ta=25C; fs=48kHz; BW=20kHz 9
S/N 94 99 dB Analog Power Supply=3.3V, Ta=25C; fs=96kHz, 192kHz; BW=40kHz 9
Input Resistance, Full Differential 5 12 k Analog Power Supply=3.3V, Ta=25C; Gain=+12dB 9
Input Resistance, Full Differential 10 25.2 k Analog Power Supply=3.3V, Ta=25C; Gain=0dB 9
Input Resistance, Full Differential 10 29.4 k Analog Power Supply=3.3V, Ta=25C; Gain=3dB 9
Input Resistance, Pseudo Differential / Single End 5 18.4 k Analog Power Supply=3.3V, Ta=25C; Gain=+12dB 9
Input Resistance, Pseudo Differential / Single End 10 30.9 k Analog Power Supply=3.3V, Ta=25C; Gain=0dB 9
Input Resistance, Pseudo Differential / Single End 10 32.4 k Analog Power Supply=3.3V, Ta=25C; Gain=3dB 9
Interchannel Isolation 110 120 dB Analog Power Supply=3.3V, Ta=25C 9
Interchannel Gain Mismatch 0 0.5 dB Analog Power Supply=3.3V, Ta=25C 9
Common Mode Rejection Ratio (CMRR) 55 80 dB Analog Power Supply=3.3V, Ta=25C 9
VREF pin Output Voltage 2.34 2.47 2.6 V Analog Power Supply=3.3V, Ta=25C 9
Power Supply Current, Normal Operation AVDD 11 16 mA Analog Power Supply=3.3V; PDN pin = H (Note 10: PLL master mode, PLL3-0 = 0101b) 9
Power Supply Current, Normal Operation DVDD (fs=48kHz) 4.7 8 mA Analog Power Supply=3.3V; PDN pin = H (Note 10); fs=48kHz 9
Power Supply Current, Normal Operation DVDD (fs=96kHz) 8.1 13 mA Analog Power Supply=3.3V; PDN pin = H (Note 10); fs=96kHz 9
Power Supply Current, Normal Operation DVDD (fs=192kHz) 7.6 12 mA Analog Power Supply=3.3V; PDN pin = H (Note 10); fs=192kHz 9
Power-down Current, AVDD+DVDD 0 10 A PDN pin = L (Note 11: all digital inputs fixed to DVDD or DVSS) 9
Input Leakage Current (Note 14) Iin 10 A Ta=40 - 105C; Note 14 input pins 16
Low-Level Output Voltage (Note 15) VOL 0.5 V Ta=40 - 105C; Iout=100µA; Note 15 output pins 16
Low-Level Output Voltage (Note 16) VOL 0.4 V Ta=40 - 105C; DVDD=3.0V - 3.6V: Iout=3mA; Note 16 SDA output 16

CAD (KiCad official)

  • Symbol: AK5522VN
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: ak5522vn-etched.step / ak5522vn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ak5522vn.step / ak5522vn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Asahi Kasei Microdevices datasheet (84 pp, sha256 39678e10998d6f18, retrieved 2026-10-31, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF