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AK4558EN

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Asahi Kasei Microdevices Audio Interface ICs, QFN-28-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AK4558EN

Asahi Kasei Microdevices · Audio Interface ICs · QFN-28-EP(5x5)

AK4558EN from Asahi Kasei Microdevices, in a QFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCOC output PS=H: connect to VSS; PS=L: loop filter output for the PLL circuit, connect to VSS unless PLL mode is used.
2 PS input Parallel/Serial mode select (L: Serial, H: Parallel); do not change while PDN is H.
3 CKS3 input Mode setting pin #3.
4 CKS2 input Mode setting pin #2.
5 CKS1 input Mode setting pin #1.
6 CKS0/TDMI input Mode setting pin #0 when PS=H; TDM data input when PS=L.
7 LRCK bidirectional Input/output channel clock; with PDN=L it outputs L in master mode and Hi-Z in slave mode.
8 SDTO output Audio serial data output; outputs L when PDN is L.
9 BICK bidirectional Audio serial data clock input/output; with PDN=L it outputs L in master mode and Hi-Z in slave mode.
10 SDTI input Audio serial data input.
11 MCKI input External master clock input.
12 TVDD power_in LDO and digital I/F power supply, 1.7 to 3.6V (LDOE=L) or 2.4 to 3.6V (LDOE=H).
13 VSS2 power_in Digital ground.
14 VDD18 bidirectional LDO output when LDOE=H (needs 1µF±50% capacitor to VSS2); 1.8V power input (1.7 to 1.98V) when LDOE=L.
15 PDN input Power-down and reset pin (L: power-down/reset, H: normal operation); reset once by bringing it L.
16 PMADL/SCL input ADC Lch power management when PS=H; control data clock (I2C) when PS=L.
17 PMADR/SDA bidirectional ADC Rch power management input when PS=H; control data input/output (I2C) when PS=L.
18 PMDAL/CAD0 input DAC Lch power management when PS=H; chip address 0 when PS=L.
19 PMDAR/CAD1 input DAC Rch power management when PS=H; chip address 1 when PS=L.
20 LOPS input DAC output power-save mode control when PS=H; must be connected to VSS2 when PS=L.
21 LDOE input LDO enable (L: disable, H: enable).
22 LIN input Lch analog input.
23 RIN input Rch analog input.
24 AVDD power_in Analog power supply, 2.4 to 3.6V (typ. 3.3V).
25 VSS1 power_in Analog ground.
26 VCOM output Common voltage output, 0.5 x AVDD; connect 1µF±50% capacitor to VSS1.
27 LOUT output Lch analog output (100kohm pulldown in power-down).
28 ROUT output Rch analog output (100kohm pulldown in power-down).
29 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Asahi Kasei Microdevices
Package QFN-28-EP(5x5)
Category Interface ICs
Pins 29

CAD (KiCad official)

  • Symbol: AK4558EN
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: QFN-28-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: ak4558en-etched.step / ak4558en-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ak4558en.step / ak4558en.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Asahi Kasei Microdevices datasheet (94 pp, sha256 c0c65b703fb88c86, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF