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AK4438VN
Public Made by Adomby adom
Asahi Kasei Microdevices Audio Interface ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAK4438VN
Asahi Kasei Microdevices · Audio Interface ICs · QFN-32-EP(5x5)
AK4438VN from Asahi Kasei Microdevices, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MCLK | input | External master clock input pin, with supported ratios of 256fs to 768fs depending on the speed mode. |
| 2 | BICK | input | Audio serial data clock pin. |
| 3 | LRCK | input | Input channel clock pin. |
| 4 | SDTI1 | input | Audio serial data input pin for DAC channel 1; unused pins must be connected to VSS1. |
| 5 | SDTI2 | input | Audio serial data input pin for DAC channel 2; unused pins must be connected to VSS1. |
| 6 | SDTI3 | input | Audio serial data input pin for DAC channel 3; unused pins must be connected to VSS1. |
| 7 | SDTI4 | input | Audio serial data input pin for DAC channel 4; unused pins must be connected to VSS1. |
| 8 | DZF | output | Zero input detect output that goes H when the input data is continuously zero for 8192 LRCK cycles, with polarity set by the DZFB bit. |
| 9 | PDN | input | Power-down and reset pin; when L the AK4438 is powered down and the control registers are reset to default state. |
| 10 | SMUTE/CAD1 | input | In parallel control mode, H starts soft mute and returning to L releases the output mute; in I2C or 3-wire mode it is chip address 1. |
| 11 | SDA/CDTI/TDM0 | bidirectional | Serial data I/O in I2C mode, control data input in 3-wire mode, and TDM mode select 0 in parallel mode. |
| 12 | SCL/CCLK/TDM1 | input | Control data clock in I2C and 3-wire modes, and TDM mode select 1 in parallel mode. |
| 13 | CAD0_I2C/CSN/DIF | input | Chip address 0 in I2C mode, chip select in 3-wire mode, and audio data format select in parallel mode (L: 32bit MSB, H: 32bit I2S). |
| 14 | PS/CAD0_SPI | input | With the I2C pin H, selects I2C (L) or parallel control (H); with the I2C pin L, it is chip address 0 in 3-wire mode. |
| 15 | AOUTL1 | output | Lch analog output pin for DAC 1; leave open when unused. |
| 16 | AOUTR1 | output | Rch analog output pin for DAC 1; leave open when unused. |
| 17 | AOUTL2 | output | Lch analog output pin for DAC 2; leave open when unused. |
| 18 | AOUTR2 | output | Rch analog output pin for DAC 2; leave open when unused. |
| 19 | VREFH | passive | Positive voltage reference input pin, normally connected to AVDD, which sets the analog output range. |
| 20 | VREFL | passive | Negative voltage reference input pin, which must be connected to VSS2. |
| 21 | VCOM | output | Common voltage output at AVDD x 1/2 that requires an external capacitor of about 2.2uF and must not draw load current. |
| 22 | VSS2 | power_in | Analog ground pin that must be connected to the same analog ground plane as VSS1. |
| 23 | AVDD | power_in | Analog power supply pin, 3.0V to 3.6V. |
| 24 | AOUTL3 | output | Lch analog output pin for DAC 3; leave open when unused. |
| 25 | AOUTR3 | output | Rch analog output pin for DAC 3; leave open when unused. |
| 26 | AOUTL4 | output | Lch analog output pin for DAC 4; leave open when unused. |
| 27 | AOUTR4 | output | Rch analog output pin for DAC 4; leave open when unused. |
| 28 | TEST | passive | Test pin that must be connected to VSS1. |
| 29 | I2C | input | Control mode select pin: L selects 3-wire serial control, H selects I2C bus or parallel control. |
| 30 | TVDD | power_in | Digital power supply pin, 1.7V to 3.6V. |
| 31 | VSS1 | power_in | Digital ground pin that must be connected to the same analog ground plane as VSS2. |
| 32 | LDOO | output | LDO output pin producing 1.2V for the internal digital circuit, which must be connected to ground through 2.2uF +/-50%. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Asahi Kasei Microdevices |
| Package | QFN-32-EP(5x5) |
| Category | Interface ICs |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
AK4438VN - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
ak4438vn-etched.step/ak4438vn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ak4438vn.step/ak4438vn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Asahi Kasei Microdevices datasheet (63 pp, sha256
bbe6752337c63e2b, retrieved 2026-10-30, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).