component
AK4432VT
Public Made by Adomby adom
Asahi Kasei Microdevices ADC/DAC - Specialized, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 9h ago |
| viewers | 9h ago |
| ak4432vt-etched.glb | 9h ago |
| ak4432vt-etched.step | 9h ago |
| ak4432vt-hero.glb | 9h ago |
| ak4432vt-hero.overlay.json | 9h ago |
| ak4432vt.glb | 9h ago |
| ak4432vt.kicad_mod | 9h ago |
| ak4432vt.kicad_sym | 9h ago |
| ak4432vt.lbr | 9h ago |
| ak4432vt.step | 9h ago |
| package.json | 9h ago |
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| README.md | 9h ago |
AK4432VT
Asahi Kasei Microdevices · ADC/DAC - Specialized · TSSOP-16
AK4432VT from Asahi Kasei Microdevices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MCLK | input | Master Clock Input Pin, held Hi-z in power down. |
| 2 | BICK | input | Audio Serial Data Clock Pin, held Hi-z in power down. |
| 3 | SDTI | input | Audio Serial Data Input Pin, held Hi-z in power down. |
| 4 | LRCK | input | Input Channel Clock Pin, held Hi-z in power down. |
| 5 | PDN | input | Power-Down and Reset Pin: when L, the AK4432 is powered down and the control registers are reset to default state. |
| 6 | SMUTE/CSN/I2CFIL | input | Soft Mute Pin in parallel control mode, Chip Select in 3-wire serial mode, and I2C mode select (L: Fast Mode 400kHz, H: Fast Mode Plus 1MHz); do not change I2CFIL while PDN is H. |
| 7 | ACKS/CCLK/SCL | input | Auto Setting Mode Select in parallel control mode (L: manual, H: auto), Control Data Clock in 3-wire serial mode, and I2C clock SCL in I2C serial mode. |
| 8 | DIF/CDTI/SDA | bidirectional | Audio Data Format Select in parallel mode (L: 32bit MSB justified, H: 32bit I2S compatible), Control Data Input in 3-wire serial mode, and I2C control data input/output SDA. |
| 9 | P/S | input | Parallel/Serial Mode Select (L: serial mode, H: parallel mode); do not change while PDN is H. |
| 10 | AOUTR | output | Rch Analog Output Pin, to be left open if unused. |
| 11 | AOUTL | output | Lch Analog Output Pin, to be left open if unused. |
| 12 | VCOM | output | Common Voltage Output Pin, AVDD x 1/2, with a large external capacitor around 2.2uF used to reduce power-supply noise. |
| 13 | VSS | power_in | Ground Pin. |
| 14 | AVDD | power_in | Analog Power Supply Pin, 3.0V to 3.6V. |
| 15 | LVDD | power_in | LDO and Digital I/F Power Supply Pin, 3.0V to 3.6V. |
| 16 | LDOO | output | LDO Output Pin, to be connected to ground with 1.0uF. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Asahi Kasei Microdevices |
| Package | TSSOP-16 |
| Category | ADC/DAC/Data Conversion |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
AK4432VT - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ak4432vt-etched.step/ak4432vt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ak4432vt.step/ak4432vt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Asahi Kasei Microdevices datasheet (46 pp, sha256
cc7da87f07c5c455, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).