component
AIPTB0106TA16.TR
Public Made by Adomby adom
Wuxi I core Elec Translators, Level Shifters, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AIPTB0106TA16.TR
Wuxi I core Elec · Translators, Level Shifters · TSSOP-16
AIPTB0106TA16.TR from Wuxi I core Elec, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 2 | VCC(A) | power_in | Supply voltage A, which may be set from 1.2 V to 3.6 V and must be less than or equal to VCC(B). |
| 3 | A2 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 4 | A3 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 5 | A4 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 6 | A5 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 7 | A6 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 8 | OE | input | Output enable input, active HIGH and referenced to VCC(A); a LOW level forces A and B into the high-impedance OFF-state. |
| 9 | GND | power_in | Ground reference at 0 V for the device. |
| 10 | B6 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
| 11 | B5 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
| 12 | B4 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
| 13 | B3 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
| 14 | B2 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
| 15 | VCC(B) | power_in | Supply voltage B, which may be set from 1.65 V to 5.5 V. |
| 16 | B1 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage A | VCC(A) | -0.5 | 6.5 | V | 8 | ||
| supply voltage B | VCC(B) | -0.5 | 6.5 | V | 8 | ||
| input voltage | VI | -0.5 | 6.5 | V | 8 | ||
| output voltage | VO | -0.5 | 6.5 | V | Power-down or 3-state mode | 8 | |
| input clamping current | IIK | -50 | mA | VI<0V | 8 | ||
| output clamping current | IOK | -50 | mA | VO<0V | 8 | ||
| output current | IO | -50 | 50 | mA | VO=0V to VCCO | 8 | |
| supply current | ICC | 100 | mA | ICC(A) or ICC(B) | 8 | ||
| ground current | IGND | -100 | mA | 8 | |||
| storage temperature | Tstg | -65 | 150 | ℃ | 8 | ||
| total power dissipation | Ptot | 500 | mW | 8 | |||
| soldering temperature | TL | 250 | ℃ | 10s | 8 | ||
| supply voltage A | VCC(A) | 1.2 | 3.6 | V | 9 | ||
| supply voltage B | VCC(B) | 1.65 | 5.5 | V | 9 | ||
| input voltage | VI | 0 | 5.5 | V | 9 | ||
| output voltage A port | VO | 0 | 3.6 | V | Power-down or 3-state mode; VCC(A)=1.2V to 3.6V; VCC(B)=1.65V to 5.5V; A port | 9 | |
| output voltage B port | VO | 0 | 5.5 | V | Power-down or 3-state mode; VCC(A)=1.2V to 3.6V; VCC(B)=1.65V to 5.5V; B port | 9 | |
| ambient temperature | Tamb | -40 | 105 | ℃ | 9 | ||
| input transition rise and fall rate | ∆t/∆V | 40 | ns/V | VCC(A)=1.2V to 3.6V; VCC(B)=1.65V to 5.5V | 9 | ||
| LOW-level output voltage A port | VOL | 0.4 | V | A or B port; IO=20uA; VCC(A)=1.4V to 3.6V | 12 | ||
| LOW-level output voltage B port | VOL | 0.4 | V | A or B port; IO=20uA; VCC(B)=1.65V to 5.5V | 12 | ||
| input leakage current | II | -5 | 5 | uA | OE input; VI=0V to 3.6V; VCC(A)=1.2V to 3.6V; VCC(B)=1.65V to 5.5V | 12 | |
| OFF-state output current | IOZ | -10 | 10 | uA | A or B port; VO=0V or VCCO; VCC(A)=1.2V to 3.6V; VCC(B)=1.65V to 5.5V | 12 | |
| power-off leakage current A port | IOFF | -10 | 10 | uA | A port; VI or VO=0V to 3.6V; VCC(A)=0V; VCC(B)=0V to 5.5V | 12 | |
| power-off leakage current B port | IOFF | -10 | 10 | uA | B port; VI or VO=0V to 5.5V; VCC(B)=0V; VCC(A)=0V to 3.6V | 12 | |
| supply current ICC(A) OE=LOW | ICC(A) | 15 | uA | VI=0V or VCCI; IO=0A; OE=LOW; VCC(A)=1.4V to 3.6V; VCC(B)=1.65V to 5.5V | 12 | ||
| supply current ICC(A) OE=HIGH | ICC(A) | 20 | uA | VI=0V or VCCI; IO=0A; OE=HIGH; VCC(A)=1.4V to 3.6V; VCC(B)=1.65V to 5.5V | 12 | ||
| supply current ICC(A) | ICC(A) | 15 | uA | VI=0V or VCCI; IO=0A; VCC(A)=3.6V; VCC(B)=0V | 12 | ||
| supply current ICC(A) | ICC(A) | -15 | uA | VI=0V or VCCI; IO=0A; VCC(A)=0V; VCC(B)=5.5V | 12 | ||
| supply current ICC(B) OE=LOW | ICC(B) | 20 | uA | VI=0V or VCCI; IO=0A; OE=LOW; VCC(A)=1.4V to 3.6V; VCC(B)=1.65V to 5.5V | 12 | ||
| supply current ICC(B) OE=HIGH | ICC(B) | 65 | uA | VI=0V or VCCI; IO=0A; OE=HIGH; VCC(A)=1.4V to 3.6V; VCC(B)=1.65V to 5.5V | 12 | ||
| supply current ICC(B) | ICC(B) | -15 | uA | VI=0V or VCCI; IO=0A; VCC(A)=3.6V; VCC(B)=0V | 13 | ||
| supply current ICC(B) | ICC(B) | 15 | uA | VI=0V or VCCI; IO=0A; VCC(A)=0V; VCC(B)=5.5V | 13 | ||
| supply current ICC(A)+ICC(B) | ICC(A)+ICC(B) | 70 | uA | VI=0V or VCCI; IO=0A; VCC(A)=1.4V to 3.6V; VCC(B)=1.65V to 5.5V | 13 | ||
| propagation delay A to B | tpd | 1.4 | 11.9 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | |
| propagation delay B to A | tpd | 0.9 | 10.9 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | |
| enable time OE to A, B | ten | 1 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | ||
| disable time OE to A; no external load | tdis | 3.7 | 19 | ns | no external load; VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | |
| disable time OE to B; no external load | tdis | 3.7 | 22 | ns | no external load; VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | |
| disable time OE to A; see Figure 4 | tdis | 105 | ns | see Figure 4; VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | ||
| disable time OE to B; see Figure 4 | tdis | 155 | ns | see Figure 4; VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | ||
| transition time A port | tt | 0.8 | 8.1 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | |
| transition time B port | tt | 1 | 9.1 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | |
| output skew time between channels | tsk(o) | 2.6 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | ||
| pulse width data inputs | tW | 25 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 | ||
| propagation delay A to B | tpd | 1.6 | 11.1 | ns | VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 | |
| propagation delay B to A | tpd | 1.5 | 9.6 | ns | VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 | |
| disable time OE to A; no external load | tdis | 2.9 | 14 | ns | no external load; VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 | |
| disable time OE to B; no external load | tdis | 4 | 20.5 | ns | no external load; VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 | |
| disable time OE to A; see Figure 4 | tdis | 125 | ns | see Figure 4; VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 | ||
| disable time OE to B; see Figure 4 | tdis | 150 | ns | see Figure 4; VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 | ||
| transition time A port | tt | 0.8 | 6.4 | ns | VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 | |
| output skew time between channels | tsk(o) | 0.8 | ns | VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 | ||
| pulse width data inputs | tW | 22 | ns | VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 |
CAD (KiCad official)
- Symbol:
AIPTB0106TA16.TR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
aiptb0106ta16-tr-etched.step/aiptb0106ta16-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);aiptb0106ta16-tr.step/aiptb0106ta16-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I core Elec datasheet (34 pp, sha256
8e05c773daa01e76, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AIPTB0106TA16.TR
**Wuxi I core Elec** · Translators, Level Shifters · TSSOP-16
AIPTB0106TA16.TR from Wuxi I core Elec, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 2 | VCC(A) | power_in | Supply voltage A, which may be set from 1.2 V to 3.6 V and must be less than or equal to VCC(B). |
| 3 | A2 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 4 | A3 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 5 | A4 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 6 | A5 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 7 | A6 | bidirectional | Data input or output referenced to VCC(A); the A-port output voltage range is 0 V to 3.6 V. |
| 8 | OE | input | Output enable input, active HIGH and referenced to VCC(A); a LOW level forces A and B into the high-impedance OFF-state. |
| 9 | GND | power_in | Ground reference at 0 V for the device. |
| 10 | B6 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
| 11 | B5 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
| 12 | B4 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
| 13 | B3 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
| 14 | B2 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
| 15 | VCC(B) | power_in | Supply voltage B, which may be set from 1.65 V to 5.5 V. |
| 16 | B1 | bidirectional | Data input or output referenced to VCC(B); the B-port output voltage range is 0 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage A | VCC(A) | -0.5 | | 6.5 | V | | 8 |
| supply voltage B | VCC(B) | -0.5 | | 6.5 | V | | 8 |
| input voltage | VI | -0.5 | | 6.5 | V | | 8 |
| output voltage | VO | -0.5 | | 6.5 | V | Power-down or 3-state mode | 8 |
| input clamping current | IIK | -50 | | | mA | VI<0V | 8 |
| output clamping current | IOK | -50 | | | mA | VO<0V | 8 |
| output current | IO | -50 | | 50 | mA | VO=0V to VCCO | 8 |
| supply current | ICC | | | 100 | mA | ICC(A) or ICC(B) | 8 |
| ground current | IGND | -100 | | | mA | | 8 |
| storage temperature | Tstg | -65 | | 150 | ℃ | | 8 |
| total power dissipation | Ptot | | | 500 | mW | | 8 |
| soldering temperature | TL | | | 250 | ℃ | 10s | 8 |
| supply voltage A | VCC(A) | 1.2 | | 3.6 | V | | 9 |
| supply voltage B | VCC(B) | 1.65 | | 5.5 | V | | 9 |
| input voltage | VI | 0 | | 5.5 | V | | 9 |
| output voltage A port | VO | 0 | | 3.6 | V | Power-down or 3-state mode; VCC(A)=1.2V to 3.6V; VCC(B)=1.65V to 5.5V; A port | 9 |
| output voltage B port | VO | 0 | | 5.5 | V | Power-down or 3-state mode; VCC(A)=1.2V to 3.6V; VCC(B)=1.65V to 5.5V; B port | 9 |
| ambient temperature | Tamb | -40 | | 105 | ℃ | | 9 |
| input transition rise and fall rate | ∆t/∆V | | | 40 | ns/V | VCC(A)=1.2V to 3.6V; VCC(B)=1.65V to 5.5V | 9 |
| LOW-level output voltage A port | VOL | | | 0.4 | V | A or B port; IO=20uA; VCC(A)=1.4V to 3.6V | 12 |
| LOW-level output voltage B port | VOL | | | 0.4 | V | A or B port; IO=20uA; VCC(B)=1.65V to 5.5V | 12 |
| input leakage current | II | -5 | | 5 | uA | OE input; VI=0V to 3.6V; VCC(A)=1.2V to 3.6V; VCC(B)=1.65V to 5.5V | 12 |
| OFF-state output current | IOZ | -10 | | 10 | uA | A or B port; VO=0V or VCCO; VCC(A)=1.2V to 3.6V; VCC(B)=1.65V to 5.5V | 12 |
| power-off leakage current A port | IOFF | -10 | | 10 | uA | A port; VI or VO=0V to 3.6V; VCC(A)=0V; VCC(B)=0V to 5.5V | 12 |
| power-off leakage current B port | IOFF | -10 | | 10 | uA | B port; VI or VO=0V to 5.5V; VCC(B)=0V; VCC(A)=0V to 3.6V | 12 |
| supply current ICC(A) OE=LOW | ICC(A) | | | 15 | uA | VI=0V or VCCI; IO=0A; OE=LOW; VCC(A)=1.4V to 3.6V; VCC(B)=1.65V to 5.5V | 12 |
| supply current ICC(A) OE=HIGH | ICC(A) | | | 20 | uA | VI=0V or VCCI; IO=0A; OE=HIGH; VCC(A)=1.4V to 3.6V; VCC(B)=1.65V to 5.5V | 12 |
| supply current ICC(A) | ICC(A) | | | 15 | uA | VI=0V or VCCI; IO=0A; VCC(A)=3.6V; VCC(B)=0V | 12 |
| supply current ICC(A) | ICC(A) | | | -15 | uA | VI=0V or VCCI; IO=0A; VCC(A)=0V; VCC(B)=5.5V | 12 |
| supply current ICC(B) OE=LOW | ICC(B) | | | 20 | uA | VI=0V or VCCI; IO=0A; OE=LOW; VCC(A)=1.4V to 3.6V; VCC(B)=1.65V to 5.5V | 12 |
| supply current ICC(B) OE=HIGH | ICC(B) | | | 65 | uA | VI=0V or VCCI; IO=0A; OE=HIGH; VCC(A)=1.4V to 3.6V; VCC(B)=1.65V to 5.5V | 12 |
| supply current ICC(B) | ICC(B) | | | -15 | uA | VI=0V or VCCI; IO=0A; VCC(A)=3.6V; VCC(B)=0V | 13 |
| supply current ICC(B) | ICC(B) | | | 15 | uA | VI=0V or VCCI; IO=0A; VCC(A)=0V; VCC(B)=5.5V | 13 |
| supply current ICC(A)+ICC(B) | ICC(A)+ICC(B) | | | 70 | uA | VI=0V or VCCI; IO=0A; VCC(A)=1.4V to 3.6V; VCC(B)=1.65V to 5.5V | 13 |
| propagation delay A to B | tpd | 1.4 | | 11.9 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| propagation delay B to A | tpd | 0.9 | | 10.9 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| enable time OE to A, B | ten | | | 1 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| disable time OE to A; no external load | tdis | 3.7 | | 19 | ns | no external load; VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| disable time OE to B; no external load | tdis | 3.7 | | 22 | ns | no external load; VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| disable time OE to A; see Figure 4 | tdis | | | 105 | ns | see Figure 4; VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| disable time OE to B; see Figure 4 | tdis | | | 155 | ns | see Figure 4; VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| transition time A port | tt | 0.8 | | 8.1 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| transition time B port | tt | 1 | | 9.1 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| output skew time between channels | tsk(o) | | | 2.6 | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| pulse width data inputs | tW | 25 | | | ns | VCC(A)=1.5V±0.1V; VCC(B)=1.8V±0.15V | 16 |
| propagation delay A to B | tpd | 1.6 | | 11.1 | ns | VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 |
| propagation delay B to A | tpd | 1.5 | | 9.6 | ns | VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 |
| disable time OE to A; no external load | tdis | 2.9 | | 14 | ns | no external load; VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 |
| disable time OE to B; no external load | tdis | 4 | | 20.5 | ns | no external load; VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 |
| disable time OE to A; see Figure 4 | tdis | | | 125 | ns | see Figure 4; VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 |
| disable time OE to B; see Figure 4 | tdis | | | 150 | ns | see Figure 4; VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 |
| transition time A port | tt | 0.8 | | 6.4 | ns | VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 |
| output skew time between channels | tsk(o) | | | 0.8 | ns | VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 |
| pulse width data inputs | tW | 22 | | | ns | VCC(A)=1.8V±0.15V; VCC(B)=1.8V±0.15V | 16 |
## CAD (KiCad official)
- Symbol: `AIPTB0106TA16.TR`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `aiptb0106ta16-tr-etched.step` / `aiptb0106ta16-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aiptb0106ta16-tr.step` / `aiptb0106ta16-tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Wuxi I core Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603112968691736576) (34 pp, sha256 `8e05c773daa01e76`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/aiptb0106ta16-tr-datasheet.pdf)