component

Aip74LVC4T774TA16.TR

Public Made by Adom

by adom

Wuxi I core Elec Buffers, Drivers, Receivers, Transceivers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicaip74lvc4t774ta16.trfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
aip74lvc4t774ta16-tr / README.md
History Download
Ray Publish 0.1.0 895cd6f 5d ago

Aip74LVC4T774TA16.TR

Wuxi I core Elec · Buffers, Drivers, Receivers, Transceivers · TSSOP-16

Aip74LVC4T774TA16.TR from Wuxi I core Elec, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR1 input Direction control input for channel 1: HIGH transmits A1 to B1 and LOW transmits B1 to A1; the input is referenced to VCC(A).
2 DIR2 input Direction control input for channel 2: HIGH transmits A2 to B2 and LOW transmits B2 to A2; the input is referenced to VCC(A).
3 A1 bidirectional Data input or output for channel 1 on the VCC(A) side, referenced to VCC(A).
4 A2 bidirectional Data input or output for channel 2 on the VCC(A) side, referenced to VCC(A).
5 A3 bidirectional Data input or output for channel 3 on the VCC(A) side, referenced to VCC(A).
6 A4 bidirectional Data input or output for channel 4 on the VCC(A) side, referenced to VCC(A).
7 DIR3 input Direction control input for channel 3: HIGH transmits A3 to B3 and LOW transmits B3 to A3; the input is referenced to VCC(A).
8 DIR4 input Direction control input for channel 4: HIGH transmits A4 to B4 and LOW transmits B4 to A4; the input is referenced to VCC(A).
9 OE input Active-LOW output enable: LOW enables the transceiver, HIGH puts the A and B ports in the high-impedance OFF-state; the input is referenced to VCC(A).
10 GND power_in Ground reference (0 V) for the device.
11 B4 bidirectional Data input or output for channel 4 on the VCC(B) side, referenced to VCC(B).
12 B3 bidirectional Data input or output for channel 3 on the VCC(B) side, referenced to VCC(B).
13 B2 bidirectional Data input or output for channel 2 on the VCC(B) side, referenced to VCC(B).
14 B1 bidirectional Data input or output for channel 1 on the VCC(B) side, referenced to VCC(B).
15 VCC(B) power_in Supply voltage B, specified from 1.2 V to 5.5 V; the Bn pins are referenced to VCC(B).
16 VCC(A) power_in Supply voltage A, specified from 1.2 V to 5.5 V; the An, OE and DIRn inputs are referenced to VCC(A).

Key specifications

Parameter Value
Manufacturer Wuxi I core Elec
Package TSSOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage A VCC(A) 1.2 5.5 V 8
supply voltage B VCC(B) 1.2 5.5 V 8
input voltage VI 0 5.5 V 8
output voltage (active mode) VO 0 V Active mode; max printed as VCCO 8
output voltage (suspend or 3-state mode) VO 0 5.5 V Suspend or 3-state mode 8
ambient temperature Tamb -40 105 ℃ 8
input transition rise and fall rate Δt/ΔV 20 ns/V VCCI=1.2V 8
input transition rise and fall rate Δt/ΔV 10 ns/V VCCI=3.0V to 3.6V 8
input transition rise and fall rate Δt/ΔV 5 ns/V VCCI=4.5V to 5.5V 8
supply voltage A VCC(A) -0.5 6.5 V 7
supply voltage B VCC(B) -0.5 6.5 V 7
input clamping current IIK -50 mA VI<0V 7
input voltage VI -0.5 6.5 V 7
output clamping current IOK -50 mA VO<0V 7
output voltage (active mode) VO -0.5 V Active mode; max printed as VCCO+0.5V 7
output voltage (suspend or 3-state mode) VO -0.5 6.5 V Suspend or 3-state mode 7
output current IO -50 50 mA VO=0V to VCCO 7
supply current ICC 100 mA ICC(A) or ICC(B); per VCC pin 7
ground current IGND -100 mA per GND pin 7
storage temperature Tstg -65 150 ℃ 7
total power dissipation Ptot 500 mW TSSOP16: derates linearly at 5.5mW/K above 60℃ 7
soldering temperature TL 250 ℃ 10s 7
HIGH-level input voltage, data input VIH 1.7 V Tamb=-40℃ to +105℃; VCCI=2.3V to 2.7V 11
HIGH-level input voltage, data input VIH 2 V Tamb=-40℃ to +105℃; VCCI=3.0V to 3.6V 11
LOW-level input voltage, data input VIL 0.7 V Tamb=-40℃ to +105℃; VCCI=2.3V to 2.7V 12
LOW-level input voltage, data input VIL 0.8 V Tamb=-40℃ to +105℃; VCCI=3.0V to 3.6V 12
HIGH-level output voltage VOH 1 V Tamb=-40℃ to +105℃; VI=VIH; IO=-6mA; VCCO=1.4V 12
HIGH-level output voltage VOH 1.2 V Tamb=-40℃ to +105℃; VI=VIH; IO=-8mA; VCCO=1.65V 12
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +105℃; VI=VIH; IO=-12mA; VCCO=2.3V 12
HIGH-level output voltage VOH 2.4 V Tamb=-40℃ to +105℃; VI=VIH; IO=-24mA; VCCO=3.0V 12
HIGH-level output voltage VOH 3.8 V Tamb=-40℃ to +105℃; VI=VIH; IO=-32mA; VCCO=4.5V 12
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +105℃; VI=VIL; IO=100uA; VCCO=1.2V to 4.5V 12
LOW-level output voltage VOL 0.3 V Tamb=-40℃ to +105℃; VI=VIL; IO=6mA; VCCO=1.4V 12
LOW-level output voltage VOL 0.45 V Tamb=-40℃ to +105℃; VI=VIL; IO=8mA; VCCO=1.65V 12
LOW-level output voltage VOL 0.55 V Tamb=-40℃ to +105℃; VI=VIL; IO=24mA; VCCO=3.0V 12
input leakage current II -10 10 uA Tamb=-40℃ to +105℃; nDIR,nOE input; VI=0V or 5.5V; VCCI=1.2V to 5.5V 12
OFF-state output current IOZ -10 10 uA Tamb=-40℃ to +105℃; A or B port; VO=0V or VCCO; VCCO=1.2V to 5.5V 12
suspend mode output current, A port IOZ -10 10 uA Tamb=-40℃ to +105℃; A port; VO=0V or VCCO; VCC(A)=5.5V; VCC(B)=0V 12
suspend mode output current, B port IOZ -10 10 uA Tamb=-40℃ to +105℃; B port; VO=0V or VCCO; VCC(A)=0V; VCC(B)=5.5V 13
power-off leakage current, A port IOFF -10 10 uA Tamb=-40℃ to +105℃; A port; VI or VO=0V to 5.5V; VCC(A)=0V; VCC(B)=1.2V to 5.5V 13
power-off leakage current, B port IOFF -10 10 uA Tamb=-40℃ to +105℃; B port; VI or VO=0V to 5.5V; VCC(B)=0V; VCC(A)=1.2V to 5.5V 13
supply current, A port ICC 20 uA Tamb=-40℃ to +105℃; A port; VI=0V or VCCI; IO=0A; VCC(A),VCC(B)=1.2V to 5.5V 13
supply current, A port ICC -4 uA Tamb=-40℃ to +105℃; A port; VI=0V or VCCI; IO=0A; VCC(A)=0V; VCC(B)=5.5V 13
supply current, B port ICC 20 uA Tamb=-40℃ to +105℃; B port; VI=0V or VCCI; IO=0A; VCC(A),VCC(B)=1.2V to 5.5V 13
supply current, B port ICC -4 uA Tamb=-40℃ to +105℃; B port; VI=0V or VCCI; IO=0A; VCC(B)=0V; VCC(A)=5.5V 13
supply current, A plus B port ICC(A)+ICC(B) 30 uA Tamb=-40℃ to +105℃; IO=0A; VI=0V or VCCI; VCC(A),VCC(B)=1.2V to 5.5V 13
additional supply current, nDIR and nOE input ΔICC 75 uA Tamb=-40℃ to +105℃; per input; VCC(A),VCC(B)=3.0V to 5.5V; nDIR or nOE input at VCC(A)-0.6V; A port at VCC(A) or GND; B port open 13
propagation delay, nAn to nBn tpd 0.8 10.3 ns Tamb=-40℃ to +105℃; VCC(A)=3.3V±0.3V; VCC(B)=3.3V±0.3V 16
propagation delay, nBn to nAn tpd 0.7 10.1 ns Tamb=-40℃ to +105℃; VCC(A)=3.3V±0.3V; VCC(B)=3.3V±0.3V 16
disable time, nOE to nAn tdis 1.6 12.2 ns Tamb=-40℃ to +105℃; VCC(A)=3.3V±0.3V; VCC(B)=3.3V±0.3V 16
disable time, nOE to nBn tdis 1.5 12.6 ns Tamb=-40℃ to +105℃; VCC(A)=3.3V±0.3V; VCC(B)=3.3V±0.3V 16
enable time, nOE to nAn ten 0.8 13.2 ns Tamb=-40℃ to +105℃; VCC(A)=3.3V±0.3V; VCC(B)=3.3V±0.3V 16
enable time, nOE to nBn ten 1.1 12.9 ns Tamb=-40℃ to +105℃; VCC(A)=3.3V±0.3V; VCC(B)=3.3V±0.3V 16

CAD (KiCad official)

  • Symbol: Aip74LVC4T774TA16.TR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: aip74lvc4t774ta16-tr-etched.step / aip74lvc4t774ta16-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74lvc4t774ta16-tr.step / aip74lvc4t774ta16-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I core Elec datasheet (27 pp, sha256 660d0b0499f06f31, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF