component
AiP74LVC4245TA24.TR
Public Made by Adomby adom
Wuxi I core Elec Buffers, Drivers, Receivers, Transceivers, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AiP74LVC4245TA24.TR
Wuxi I core Elec · Buffers, Drivers, Receivers, Transceivers · TSSOP-24
AiP74LVC4245TA24.TR from Wuxi I core Elec, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC(A) | power_in | Supply voltage for the 5V bus side (A), recommended range 1.5 V to 5.5 V, and it must be equal to or greater than VCC(B). |
| 2 | DIR | input | Direction control input that selects the transfer direction between the A and B ports, as defined in the function table (section 2.4). |
| 3 | A0 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 4 | A1 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 5 | A2 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 6 | A3 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 7 | A4 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 8 | A5 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 9 | A6 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 10 | A7 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 11 | GND | power_in | Ground reference, 0 V. |
| 12 | GND | power_in | Ground reference, 0 V. |
| 13 | GND | power_in | Ground reference, 0 V. |
| 14 | B7 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 15 | B6 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 16 | B5 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 17 | B4 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 18 | B3 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 19 | B2 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 20 | B1 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 21 | B0 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 22 | OE | input | Output enable input, active low; when driven high, the A and B ports are placed in high impedance (Z). |
| 23 | VCC(B) | power_in | Supply voltage for the 3V bus side (B), recommended range 1.5 V to 3.6 V. |
| 24 | VCC(B) | power_in | Supply voltage for the 3V bus side (B), recommended range 1.5 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | TSSOP-24 |
| Category | Logic |
| Pins | 24 |
CAD (KiCad official)
- Symbol:
AiP74LVC4245TA24.TR - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
aip74lvc4245ta24-tr-etched.step/aip74lvc4245ta24-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);aip74lvc4245ta24-tr.step/aip74lvc4245ta24-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I core Elec datasheet (18 pp, sha256
e8896ac5dd3009d9, retrieved 2026-10-09, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AiP74LVC4245TA24.TR
**Wuxi I core Elec** · Buffers, Drivers, Receivers, Transceivers · TSSOP-24
AiP74LVC4245TA24.TR from Wuxi I core Elec, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC(A) | power_in | Supply voltage for the 5V bus side (A), recommended range 1.5 V to 5.5 V, and it must be equal to or greater than VCC(B). |
| 2 | DIR | input | Direction control input that selects the transfer direction between the A and B ports, as defined in the function table (section 2.4). |
| 3 | A0 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 4 | A1 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 5 | A2 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 6 | A3 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 7 | A4 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 8 | A5 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 9 | A6 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 10 | A7 | bidirectional | Data input or output on the A (5V bus) side; it is set to high impedance when OE is high, and is high impedance when VCC(A) = 0 V. |
| 11 | GND | power_in | Ground reference, 0 V. |
| 12 | GND | power_in | Ground reference, 0 V. |
| 13 | GND | power_in | Ground reference, 0 V. |
| 14 | B7 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 15 | B6 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 16 | B5 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 17 | B4 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 18 | B3 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 19 | B2 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 20 | B1 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 21 | B0 | bidirectional | Data input or output on the B (3V bus) side; it is set to high impedance when OE is high. |
| 22 | OE | input | Output enable input, active low; when driven high, the A and B ports are placed in high impedance (Z). |
| 23 | VCC(B) | power_in | Supply voltage for the 3V bus side (B), recommended range 1.5 V to 3.6 V. |
| 24 | VCC(B) | power_in | Supply voltage for the 3V bus side (B), recommended range 1.5 V to 3.6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | TSSOP-24 |
| Category | Logic |
| Pins | 24 |
## CAD (KiCad official)
- Symbol: `AiP74LVC4245TA24.TR`
- Footprint: `Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm`
- 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files: `aip74lvc4245ta24-tr-etched.step` / `aip74lvc4245ta24-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aip74lvc4245ta24-tr.step` / `aip74lvc4245ta24-tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Wuxi I core Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603346323009781760) (18 pp, sha256 `e8896ac5dd3009d9`, retrieved 2026-10-09, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/aip74lvc4245ta24-tr-datasheet.pdf)