component
AiP74LVC2T45YA8.TR
Public Made by Adomby adom
Wuxi I core Elec Buffers, Drivers, Receivers, Transceivers, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
AiP74LVC2T45YA8.TR
Wuxi I core Elec · Buffers, Drivers, Receivers, Transceivers · VSSOP-8
AiP74LVC2T45YA8.TR from Wuxi I core Elec, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC(A) | power_in | Supply voltage A for port A and DIR, specified from 1.2 V to 5.5 V, with suspend mode when VCC(A) is at GND level. |
| 2 | 1A | bidirectional | Data input or output on port A, referenced to VCC(A), with inputs accepting voltages up to 5.5 V. |
| 3 | 2A | bidirectional | Data input or output on port A, referenced to VCC(A), with inputs accepting voltages up to 5.5 V. |
| 4 | GND | power_in | Ground reference (0 V) for the device. |
| 5 | DIR | input | Direction control referenced to VCC(A): HIGH allows transmission from A to B and LOW allows transmission from B to A. |
| 6 | 2B | bidirectional | Data input or output on port B, referenced to VCC(B), with inputs accepting voltages up to 5.5 V. |
| 7 | 1B | bidirectional | Data input or output on port B, referenced to VCC(B), with inputs accepting voltages up to 5.5 V. |
| 8 | VCC(B) | power_in | Supply voltage B for port B, specified from 1.2 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | VSSOP-8 |
| Category | Logic |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage A | VCC(A) | 1.2 | 5.5 | V | 6 | ||
| supply voltage B | VCC(B) | 1.2 | 5.5 | V | 6 | ||
| input voltage | VI | 0 | 5.5 | V | 6 | ||
| output voltage | VO | 0 | V | Active mode | 6 | ||
| output voltage | VO | 0 | 5.5 | V | Suspend or 3-state mode | 6 | |
| ambient temperature | Tamb | -40 | 105 | ℃ | 6 | ||
| input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCCI=1.2V | 6 | ||
| input transition rise and fall rate | Δt/ΔV | 10 | ns/V | VCCI=3V to 3.6V | 6 | ||
| input transition rise and fall rate | Δt/ΔV | 5 | ns/V | VCCI=4.5V to 5.5V | 6 | ||
| supply voltage A | VCC(A) | -0.5 | 6.5 | V | 5 | ||
| supply voltage B | VCC(B) | -0.5 | 6.5 | V | 5 | ||
| input clamping current | VIK | -50 | mA | VI<0V | 5 | ||
| input voltage | VI | -0.5 | 6.5 | V | 5 | ||
| output clamping current | IOK | -50 | mA | VO<0V | 5 | ||
| output voltage | VO | -0.5 | V | Active mode | 5 | ||
| output voltage | VO | -0.5 | 6.5 | V | Suspend or 3-state mode | 5 | |
| output current | IO | -50 | 50 | mA | VO=0V to VCCO | 5 | |
| supply current | ICC | 100 | mA | ICC(A) or ICC(B) | 5 | ||
| ground current | IGND | -100 | mA | 5 | |||
| storage temperature | Tstg | -65 | 150 | ℃ | 5 | ||
| total power dissipation | Ptot | 250 | mW | Tamb=-40℃ to +105℃ | 5 | ||
| soldering temperature | TL | 250 | ℃ | 10s | 5 | ||
| input leakage current | II | -10 | 10 | uA | DIR input; VI=0V to 5.5V; VCCI=1.2V to 5.5V | 10 | |
| HIGH-level input voltage | VIH | 1.7 | V | data input; VCCI=2.3V to 2.7V | 9 | ||
| HIGH-level input voltage | VIH | 2 | V | data input; VCCI=3.0V to 3.6V | 9 | ||
| LOW-level input voltage | VIL | 0.7 | V | data input; VCCI=2.3V to 2.7V | 9 | ||
| LOW-level input voltage | VIL | 0.8 | V | data input; VCCI=3.0V to 3.6V | 9 | ||
| HIGH-level output voltage | VOH | 1 | V | VI=VIH; IO=-6mA; VCCO=1.4V | 9 | ||
| HIGH-level output voltage | VOH | 1.2 | V | VI=VIH; IO=-8mA; VCCO=1.65V | 9 | ||
| HIGH-level output voltage | VOH | 1.9 | V | VI=VIH; IO=-12mA; VCCO=2.3V | 9 | ||
| HIGH-level output voltage | VOH | 2.4 | V | VI=VIH; IO=-24mA; VCCO=3.0V | 9 | ||
| HIGH-level output voltage | VOH | 3.8 | V | VI=VIH; IO=-32mA; VCCO=4.5V | 9 | ||
| LOW-level output voltage | VOL | 0.1 | V | VI=VIH; IO=100uA; VCCO=1.2V to 4.5V | 9 | ||
| LOW-level output voltage | VOL | 0.3 | V | VI=VIH; IO=6mA; VCCO=1.4V | 9 | ||
| LOW-level output voltage | VOL | 0.45 | V | VI=VIH; IO=8mA; VCCO=1.65V | 9 | ||
| LOW-level output voltage | VOL | 0.55 | V | VI=VIH; IO=24mA; VCCO=3.0V | 9 | ||
| supply current (A port) | ICC | 8 | uA | A port; VI=0V or VCCI; IO=0A; VCC(A), VCC(B)=1.2V to 5.5V | 10 | ||
| supply current (A port) | ICC | 3 | uA | A port; VI=0V or VCCI; IO=0A; VCC(A), VCC(B)=1.65V to 5.5V | 10 | ||
| supply current (A port) | ICC | 2 | uA | A port; VI=0V or VCCI; IO=0A; VCC(A)=5.5V; VCC(B)=0V | 10 | ||
| supply current (A port) | ICC | -2 | uA | A port; VI=0V or VCCI; IO=0A; VCC(A)=0V; VCC(B)=5.5V | 10 | ||
| supply current (B port) | ICC | 8 | uA | B port; VI=0V or VCCI; IO=0A; VCC(A), VCC(B)=1.2V to 5.5V | 10 | ||
| supply current (B port) | ICC | 3 | uA | B port; VI=0V or VCCI; IO=0A; VCC(A), VCC(B)=1.65V to 5.5V | 10 | ||
| supply current (B port) | ICC | -2 | uA | B port; VI=0V or VCCI; IO=0A; VCC(B)=0V; VCC(A)=5.5V | 10 | ||
| supply current (B port) | ICC | 2 | uA | B port; VI=0V or VCCI; IO=0A; VCC(B)=5.5V; VCC(A)=0V | 10 | ||
| supply current (A plus B) | ICC(A)+ICC(B) | 16 | uA | IO=0A; VI=0V or VCCI; VCC(A), VCC(B)=1.2V to 5.5V | 10 | ||
| supply current (A plus B) | ICC(A)+ICC(B) | 4 | uA | IO=0A; VI=0V or VCCI; VCC(A), VCC(B)=1.65V to 5.5V | 10 | ||
| OFF-state output current | IOZ | -10 | 10 | uA | A or B port; VO=0V or VCCO; VCCO=1.2V to 5.5V | 10 | |
| power-off leakage current (A port) | IOFF | -10 | 10 | uA | A port; VI or VO=0V to 5.5V; VCC(A)=0V; VCC(B)=1.2V to 5.5V | 10 | |
| power-off leakage current (B port) | IOFF | -10 | 10 | uA | B port; VI or VO=0V to 5.5V; VCC(B)=0V; VCC(A)=1.2V to 5.5V | 10 | |
| additional supply current (A port) | ΔICC | 75 | uA | per input; VCC(A), VCC(B)=3.0V to 5.5V; A port at VCC(A)-0.6V; DIR at VCC(A); B port=open | 10 | ||
| additional supply current (DIR) | ΔICC | 75 | uA | DIR input; DIR at VCC(A)-0.6V; A port at VCC(A) or GND; B port=open | 10 | ||
| additional supply current (B port) | ΔICC | 75 | uA | per input; VCC(A), VCC(B)=3.0V to 5.5V; B port at VCC(B)-0.6V; DIR at GND; A port=open | 11 |
CAD (KiCad official)
- Symbol:
AiP74LVC2T45YA8.TR - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
aip74lvc2t45ya8-tr-etched.step/aip74lvc2t45ya8-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);aip74lvc2t45ya8-tr.step/aip74lvc2t45ya8-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I core Elec datasheet (30 pp, sha256
ddf20f73ae1f19b7, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AiP74LVC2T45YA8.TR
**Wuxi I core Elec** · Buffers, Drivers, Receivers, Transceivers · VSSOP-8
AiP74LVC2T45YA8.TR from Wuxi I core Elec, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC(A) | power_in | Supply voltage A for port A and DIR, specified from 1.2 V to 5.5 V, with suspend mode when VCC(A) is at GND level. |
| 2 | 1A | bidirectional | Data input or output on port A, referenced to VCC(A), with inputs accepting voltages up to 5.5 V. |
| 3 | 2A | bidirectional | Data input or output on port A, referenced to VCC(A), with inputs accepting voltages up to 5.5 V. |
| 4 | GND | power_in | Ground reference (0 V) for the device. |
| 5 | DIR | input | Direction control referenced to VCC(A): HIGH allows transmission from A to B and LOW allows transmission from B to A. |
| 6 | 2B | bidirectional | Data input or output on port B, referenced to VCC(B), with inputs accepting voltages up to 5.5 V. |
| 7 | 1B | bidirectional | Data input or output on port B, referenced to VCC(B), with inputs accepting voltages up to 5.5 V. |
| 8 | VCC(B) | power_in | Supply voltage B for port B, specified from 1.2 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | VSSOP-8 |
| Category | Logic |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage A | VCC(A) | 1.2 | | 5.5 | V | | 6 |
| supply voltage B | VCC(B) | 1.2 | | 5.5 | V | | 6 |
| input voltage | VI | 0 | | 5.5 | V | | 6 |
| output voltage | VO | 0 | | | V | Active mode | 6 |
| output voltage | VO | 0 | | 5.5 | V | Suspend or 3-state mode | 6 |
| ambient temperature | Tamb | -40 | | 105 | ℃ | | 6 |
| input transition rise and fall rate | Δt/ΔV | | | 20 | ns/V | VCCI=1.2V | 6 |
| input transition rise and fall rate | Δt/ΔV | | | 10 | ns/V | VCCI=3V to 3.6V | 6 |
| input transition rise and fall rate | Δt/ΔV | | | 5 | ns/V | VCCI=4.5V to 5.5V | 6 |
| supply voltage A | VCC(A) | -0.5 | | 6.5 | V | | 5 |
| supply voltage B | VCC(B) | -0.5 | | 6.5 | V | | 5 |
| input clamping current | VIK | -50 | | | mA | VI<0V | 5 |
| input voltage | VI | -0.5 | | 6.5 | V | | 5 |
| output clamping current | IOK | -50 | | | mA | VO<0V | 5 |
| output voltage | VO | -0.5 | | | V | Active mode | 5 |
| output voltage | VO | -0.5 | | 6.5 | V | Suspend or 3-state mode | 5 |
| output current | IO | -50 | | 50 | mA | VO=0V to VCCO | 5 |
| supply current | ICC | | | 100 | mA | ICC(A) or ICC(B) | 5 |
| ground current | IGND | -100 | | | mA | | 5 |
| storage temperature | Tstg | -65 | | 150 | ℃ | | 5 |
| total power dissipation | Ptot | | | 250 | mW | Tamb=-40℃ to +105℃ | 5 |
| soldering temperature | TL | | | 250 | ℃ | 10s | 5 |
| input leakage current | II | -10 | | 10 | uA | DIR input; VI=0V to 5.5V; VCCI=1.2V to 5.5V | 10 |
| HIGH-level input voltage | VIH | 1.7 | | | V | data input; VCCI=2.3V to 2.7V | 9 |
| HIGH-level input voltage | VIH | 2 | | | V | data input; VCCI=3.0V to 3.6V | 9 |
| LOW-level input voltage | VIL | | | 0.7 | V | data input; VCCI=2.3V to 2.7V | 9 |
| LOW-level input voltage | VIL | | | 0.8 | V | data input; VCCI=3.0V to 3.6V | 9 |
| HIGH-level output voltage | VOH | 1 | | | V | VI=VIH; IO=-6mA; VCCO=1.4V | 9 |
| HIGH-level output voltage | VOH | 1.2 | | | V | VI=VIH; IO=-8mA; VCCO=1.65V | 9 |
| HIGH-level output voltage | VOH | 1.9 | | | V | VI=VIH; IO=-12mA; VCCO=2.3V | 9 |
| HIGH-level output voltage | VOH | 2.4 | | | V | VI=VIH; IO=-24mA; VCCO=3.0V | 9 |
| HIGH-level output voltage | VOH | 3.8 | | | V | VI=VIH; IO=-32mA; VCCO=4.5V | 9 |
| LOW-level output voltage | VOL | | | 0.1 | V | VI=VIH; IO=100uA; VCCO=1.2V to 4.5V | 9 |
| LOW-level output voltage | VOL | | | 0.3 | V | VI=VIH; IO=6mA; VCCO=1.4V | 9 |
| LOW-level output voltage | VOL | | | 0.45 | V | VI=VIH; IO=8mA; VCCO=1.65V | 9 |
| LOW-level output voltage | VOL | | | 0.55 | V | VI=VIH; IO=24mA; VCCO=3.0V | 9 |
| supply current (A port) | ICC | | | 8 | uA | A port; VI=0V or VCCI; IO=0A; VCC(A), VCC(B)=1.2V to 5.5V | 10 |
| supply current (A port) | ICC | | | 3 | uA | A port; VI=0V or VCCI; IO=0A; VCC(A), VCC(B)=1.65V to 5.5V | 10 |
| supply current (A port) | ICC | | | 2 | uA | A port; VI=0V or VCCI; IO=0A; VCC(A)=5.5V; VCC(B)=0V | 10 |
| supply current (A port) | ICC | -2 | | | uA | A port; VI=0V or VCCI; IO=0A; VCC(A)=0V; VCC(B)=5.5V | 10 |
| supply current (B port) | ICC | | | 8 | uA | B port; VI=0V or VCCI; IO=0A; VCC(A), VCC(B)=1.2V to 5.5V | 10 |
| supply current (B port) | ICC | | | 3 | uA | B port; VI=0V or VCCI; IO=0A; VCC(A), VCC(B)=1.65V to 5.5V | 10 |
| supply current (B port) | ICC | -2 | | | uA | B port; VI=0V or VCCI; IO=0A; VCC(B)=0V; VCC(A)=5.5V | 10 |
| supply current (B port) | ICC | | | 2 | uA | B port; VI=0V or VCCI; IO=0A; VCC(B)=5.5V; VCC(A)=0V | 10 |
| supply current (A plus B) | ICC(A)+ICC(B) | | | 16 | uA | IO=0A; VI=0V or VCCI; VCC(A), VCC(B)=1.2V to 5.5V | 10 |
| supply current (A plus B) | ICC(A)+ICC(B) | | | 4 | uA | IO=0A; VI=0V or VCCI; VCC(A), VCC(B)=1.65V to 5.5V | 10 |
| OFF-state output current | IOZ | -10 | | 10 | uA | A or B port; VO=0V or VCCO; VCCO=1.2V to 5.5V | 10 |
| power-off leakage current (A port) | IOFF | -10 | | 10 | uA | A port; VI or VO=0V to 5.5V; VCC(A)=0V; VCC(B)=1.2V to 5.5V | 10 |
| power-off leakage current (B port) | IOFF | -10 | | 10 | uA | B port; VI or VO=0V to 5.5V; VCC(B)=0V; VCC(A)=1.2V to 5.5V | 10 |
| additional supply current (A port) | ΔICC | | | 75 | uA | per input; VCC(A), VCC(B)=3.0V to 5.5V; A port at VCC(A)-0.6V; DIR at VCC(A); B port=open | 10 |
| additional supply current (DIR) | ΔICC | | | 75 | uA | DIR input; DIR at VCC(A)-0.6V; A port at VCC(A) or GND; B port=open | 10 |
| additional supply current (B port) | ΔICC | | | 75 | uA | per input; VCC(A), VCC(B)=3.0V to 5.5V; B port at VCC(B)-0.6V; DIR at GND; A port=open | 11 |
## CAD (KiCad official)
- Symbol: `AiP74LVC2T45YA8.TR`
- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`
- 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `aip74lvc2t45ya8-tr-etched.step` / `aip74lvc2t45ya8-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aip74lvc2t45ya8-tr.step` / `aip74lvc2t45ya8-tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Wuxi I core Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589837770626523136) (30 pp, sha256 `ddf20f73ae1f19b7`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/aip74lvc2t45ya8-tr-datasheet.pdf)