component
AiP74LVC2G02TA8.TR
Public Made by Adomby adom
Wuxi I core Elec Logic Gates, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AiP74LVC2G02TA8.TR
Wuxi I core Elec · Logic Gates · TSSOP-8
AiP74LVC2G02TA8.TR from Wuxi I core Elec, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of gate 1 (NOR gate input); the datasheet states inputs accept voltages up to 5V and can be driven from 3.3V or 5V devices. |
| 2 | 1B | input | Data input 1B of gate 1 (NOR gate input); the datasheet states inputs accept voltages up to 5V and can be driven from 3.3V or 5V devices. |
| 3 | 2Y | output | Data output 2Y of gate 2, which is low when either 2A or 2B is high; the datasheet states outputs are 5V tolerant and rated ±24mA drive at VCC=3.0V. |
| 4 | GND | power_in | Ground (0V) reference for all voltages in the datasheet. |
| 5 | 2A | input | Data input 2A of gate 2 (NOR gate input); the datasheet states inputs accept voltages up to 5V and can be driven from 3.3V or 5V devices. |
| 6 | 2B | input | Data input 2B of gate 2 (NOR gate input); the datasheet states inputs accept voltages up to 5V and can be driven from 3.3V or 5V devices. |
| 7 | 1Y | output | Data output 1Y of gate 1, which is low when either 1A or 1B is high; the datasheet states outputs are 5V tolerant and rated ±24mA drive at VCC=3.0V. |
| 8 | VCC | power_in | Supply voltage, specified from 1.65V to 5.5V in the recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | TSSOP-8 |
| Category | Logic |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 6.5 | V | 4 | ||
| input voltage | VI | -0.5 | 6.5 | V | 4 | ||
| output voltage | VO | -0.5 | V | Active mode; printed max is VCC+0.5 | 4 | ||
| output voltage | VO | -0.5 | 6.5 | V | Power-down mode; VCC=0V | 4 | |
| input clamping current | IIK | -50 | mA | VI < 0V | 4 | ||
| output clamping current | IOK | -50 | 50 | mA | VO > VCC or VO < 0V | 4 | |
| output current | IO | -50 | 50 | mA | VO=0V to VCC | 4 | |
| supply current | ICC | 100 | mA | 4 | |||
| ground current | IGND | -100 | mA | 4 | |||
| storage temperature | Tstg | -65 | 150 | ℃ | 4 | ||
| total power dissipation | Ptot | 300 | mW | TSSOP8: above 55℃ derates linearly 2.5mW/K | 4 | ||
| soldering temperature | TL | 250 | ℃ | 10s | 4 | ||
| supply voltage | VCC | 1.65 | 5.5 | V | 4 | ||
| input voltage | VI | 0 | 5.5 | V | 4 | ||
| output voltage | VO | 0 | V | Active mode; printed max is VCC | 4 | ||
| output voltage | VO | 0 | 5.5 | V | Power-down mode; VCC=0V | 4 | |
| ambient temperature | Tamb | -40 | 105 | ℃ | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC=1.65V to 2.7V | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 10 | ns/V | VCC=2.7V to 5.5V | 4 | ||
| HIGH-level input voltage | VIH | 0.65 | ×VCC | Tamb=-40℃ to +105℃; VCC=1.65V to 1.95V | 6 | ||
| HIGH-level input voltage | VIH | 1.7 | V | Tamb=-40℃ to +105℃; VCC=2.3V to 2.7V | 6 | ||
| HIGH-level input voltage | VIH | 2 | V | Tamb=-40℃ to +105℃; VCC=2.7V to 3.6V | 6 | ||
| HIGH-level input voltage | VIH | 0.7 | ×VCC | Tamb=-40℃ to +105℃; VCC=4.5V to 5.5V | 6 | ||
| LOW-level input voltage | VIL | 0.35 | ×VCC | Tamb=-40℃ to +105℃; VCC=1.65V to 1.95V | 6 | ||
| LOW-level input voltage | VIL | 0.7 | V | Tamb=-40℃ to +105℃; VCC=2.3V to 2.7V | 6 | ||
| LOW-level input voltage | VIL | 0.8 | V | Tamb=-40℃ to +105℃; VCC=2.7V to 3.6V | 6 | ||
| LOW-level input voltage | VIL | 0.3 | ×VCC | Tamb=-40℃ to +105℃; VCC=4.5V to 5.5V | 6 | ||
| HIGH-level output voltage | VOH | 0.95 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=-4mA; VCC=1.65V | 6 | ||
| HIGH-level output voltage | VOH | 1.7 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=-8mA; VCC=2.3V | 6 | ||
| HIGH-level output voltage | VOH | 1.9 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=-12mA; VCC=2.7V | 6 | ||
| HIGH-level output voltage | VOH | 2 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=-24mA; VCC=3.0V | 6 | ||
| HIGH-level output voltage | VOH | 3.4 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=-32mA; VCC=4.5V | 6 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=100uA; VCC=1.65V to 5.5V | 6 | ||
| LOW-level output voltage | VOL | 0.7 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=4mA; VCC=1.65V | 6 | ||
| LOW-level output voltage | VOL | 0.45 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=8mA; VCC=2.3V | 6 | ||
| LOW-level output voltage | VOL | 0.6 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=12mA; VCC=2.7V | 6 | ||
| LOW-level output voltage | VOL | 0.8 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=24mA; VCC=3.0V | 6 | ||
| input leakage current | II | -1 | 1 | uA | Tamb=-40℃ to +105℃; VI=5.5V or GND; VCC=0V to 5.5V | 6 | |
| power-off leakage current | IOFF | -2 | 2 | uA | Tamb=-40℃ to +105℃; VI or VO=5.5V; VCC=0V | 6 | |
| supply current | ICC | 4 | uA | Tamb=-40℃ to +105℃; VI=5.5V or GND; IO=0A; VCC=1.65V to 5.5V | 6 | ||
| additional supply current | ΔICC | 500 | uA | Tamb=-40℃ to +105℃; per pin; VI=VCC-0.6V; IO=0A; VCC=2.3V to 5.5V | 6 | ||
| propagation delay nA, nB to nY | tpd | 1.2 | 11.2 | ns | Tamb=-40℃ to +105℃; see Figure 5; VCC=1.65V to 1.95V | 7 | |
| propagation delay nA, nB to nY | tpd | 0.8 | 6.8 | ns | Tamb=-40℃ to +105℃; see Figure 5; VCC=2.3V to 2.7V | 7 | |
| propagation delay nA, nB to nY | tpd | 0.8 | 7.5 | ns | Tamb=-40℃ to +105℃; see Figure 5; VCC=2.7V | 7 | |
| propagation delay nA, nB to nY | tpd | 0.6 | 6.2 | ns | Tamb=-40℃ to +105℃; see Figure 5; VCC=3.0V to 3.6V | 7 | |
| propagation delay nA, nB to nY | tpd | 0.6 | 5.5 | ns | Tamb=-40℃ to +105℃; see Figure 5; VCC=4.5V to 5.5V | 7 | |
| input capacitance | CI | 2.5 | pF | Tamb=-40℃ to +85℃ table (DC Characteristics 1) | 5 |
CAD (KiCad official)
- Symbol:
AiP74LVC2G02TA8.TR - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
aip74lvc2g02ta8-tr-etched.step/aip74lvc2g02ta8-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);aip74lvc2g02ta8-tr.step/aip74lvc2g02ta8-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I core Elec datasheet (12 pp, sha256
596635f584b96ed3, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AiP74LVC2G02TA8.TR
**Wuxi I core Elec** · Logic Gates · TSSOP-8
AiP74LVC2G02TA8.TR from Wuxi I core Elec, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of gate 1 (NOR gate input); the datasheet states inputs accept voltages up to 5V and can be driven from 3.3V or 5V devices. |
| 2 | 1B | input | Data input 1B of gate 1 (NOR gate input); the datasheet states inputs accept voltages up to 5V and can be driven from 3.3V or 5V devices. |
| 3 | 2Y | output | Data output 2Y of gate 2, which is low when either 2A or 2B is high; the datasheet states outputs are 5V tolerant and rated ±24mA drive at VCC=3.0V. |
| 4 | GND | power_in | Ground (0V) reference for all voltages in the datasheet. |
| 5 | 2A | input | Data input 2A of gate 2 (NOR gate input); the datasheet states inputs accept voltages up to 5V and can be driven from 3.3V or 5V devices. |
| 6 | 2B | input | Data input 2B of gate 2 (NOR gate input); the datasheet states inputs accept voltages up to 5V and can be driven from 3.3V or 5V devices. |
| 7 | 1Y | output | Data output 1Y of gate 1, which is low when either 1A or 1B is high; the datasheet states outputs are 5V tolerant and rated ±24mA drive at VCC=3.0V. |
| 8 | VCC | power_in | Supply voltage, specified from 1.65V to 5.5V in the recommended operating conditions. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | TSSOP-8 |
| Category | Logic |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | | 6.5 | V | | 4 |
| input voltage | VI | -0.5 | | 6.5 | V | | 4 |
| output voltage | VO | -0.5 | | | V | Active mode; printed max is VCC+0.5 | 4 |
| output voltage | VO | -0.5 | | 6.5 | V | Power-down mode; VCC=0V | 4 |
| input clamping current | IIK | -50 | | | mA | VI < 0V | 4 |
| output clamping current | IOK | -50 | | 50 | mA | VO > VCC or VO < 0V | 4 |
| output current | IO | -50 | | 50 | mA | VO=0V to VCC | 4 |
| supply current | ICC | | | 100 | mA | | 4 |
| ground current | IGND | -100 | | | mA | | 4 |
| storage temperature | Tstg | -65 | | 150 | ℃ | | 4 |
| total power dissipation | Ptot | | | 300 | mW | TSSOP8: above 55℃ derates linearly 2.5mW/K | 4 |
| soldering temperature | TL | | | 250 | ℃ | 10s | 4 |
| supply voltage | VCC | 1.65 | | 5.5 | V | | 4 |
| input voltage | VI | 0 | | 5.5 | V | | 4 |
| output voltage | VO | 0 | | | V | Active mode; printed max is VCC | 4 |
| output voltage | VO | 0 | | 5.5 | V | Power-down mode; VCC=0V | 4 |
| ambient temperature | Tamb | -40 | | 105 | ℃ | | 4 |
| input transition rise and fall rate | Δt/ΔV | | | 20 | ns/V | VCC=1.65V to 2.7V | 4 |
| input transition rise and fall rate | Δt/ΔV | | | 10 | ns/V | VCC=2.7V to 5.5V | 4 |
| HIGH-level input voltage | VIH | 0.65 | | | ×VCC | Tamb=-40℃ to +105℃; VCC=1.65V to 1.95V | 6 |
| HIGH-level input voltage | VIH | 1.7 | | | V | Tamb=-40℃ to +105℃; VCC=2.3V to 2.7V | 6 |
| HIGH-level input voltage | VIH | 2 | | | V | Tamb=-40℃ to +105℃; VCC=2.7V to 3.6V | 6 |
| HIGH-level input voltage | VIH | 0.7 | | | ×VCC | Tamb=-40℃ to +105℃; VCC=4.5V to 5.5V | 6 |
| LOW-level input voltage | VIL | | | 0.35 | ×VCC | Tamb=-40℃ to +105℃; VCC=1.65V to 1.95V | 6 |
| LOW-level input voltage | VIL | | | 0.7 | V | Tamb=-40℃ to +105℃; VCC=2.3V to 2.7V | 6 |
| LOW-level input voltage | VIL | | | 0.8 | V | Tamb=-40℃ to +105℃; VCC=2.7V to 3.6V | 6 |
| LOW-level input voltage | VIL | | | 0.3 | ×VCC | Tamb=-40℃ to +105℃; VCC=4.5V to 5.5V | 6 |
| HIGH-level output voltage | VOH | 0.95 | | | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=-4mA; VCC=1.65V | 6 |
| HIGH-level output voltage | VOH | 1.7 | | | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=-8mA; VCC=2.3V | 6 |
| HIGH-level output voltage | VOH | 1.9 | | | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=-12mA; VCC=2.7V | 6 |
| HIGH-level output voltage | VOH | 2 | | | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=-24mA; VCC=3.0V | 6 |
| HIGH-level output voltage | VOH | 3.4 | | | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=-32mA; VCC=4.5V | 6 |
| LOW-level output voltage | VOL | | | 0.1 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=100uA; VCC=1.65V to 5.5V | 6 |
| LOW-level output voltage | VOL | | | 0.7 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=4mA; VCC=1.65V | 6 |
| LOW-level output voltage | VOL | | | 0.45 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=8mA; VCC=2.3V | 6 |
| LOW-level output voltage | VOL | | | 0.6 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=12mA; VCC=2.7V | 6 |
| LOW-level output voltage | VOL | | | 0.8 | V | Tamb=-40℃ to +105℃; VI = VIH or VIL; IO=24mA; VCC=3.0V | 6 |
| input leakage current | II | -1 | | 1 | uA | Tamb=-40℃ to +105℃; VI=5.5V or GND; VCC=0V to 5.5V | 6 |
| power-off leakage current | IOFF | -2 | | 2 | uA | Tamb=-40℃ to +105℃; VI or VO=5.5V; VCC=0V | 6 |
| supply current | ICC | | | 4 | uA | Tamb=-40℃ to +105℃; VI=5.5V or GND; IO=0A; VCC=1.65V to 5.5V | 6 |
| additional supply current | ΔICC | | | 500 | uA | Tamb=-40℃ to +105℃; per pin; VI=VCC-0.6V; IO=0A; VCC=2.3V to 5.5V | 6 |
| propagation delay nA, nB to nY | tpd | 1.2 | | 11.2 | ns | Tamb=-40℃ to +105℃; see Figure 5; VCC=1.65V to 1.95V | 7 |
| propagation delay nA, nB to nY | tpd | 0.8 | | 6.8 | ns | Tamb=-40℃ to +105℃; see Figure 5; VCC=2.3V to 2.7V | 7 |
| propagation delay nA, nB to nY | tpd | 0.8 | | 7.5 | ns | Tamb=-40℃ to +105℃; see Figure 5; VCC=2.7V | 7 |
| propagation delay nA, nB to nY | tpd | 0.6 | | 6.2 | ns | Tamb=-40℃ to +105℃; see Figure 5; VCC=3.0V to 3.6V | 7 |
| propagation delay nA, nB to nY | tpd | 0.6 | | 5.5 | ns | Tamb=-40℃ to +105℃; see Figure 5; VCC=4.5V to 5.5V | 7 |
| input capacitance | CI | | | 2.5 | pF | Tamb=-40℃ to +85℃ table (DC Characteristics 1) | 5 |
## CAD (KiCad official)
- Symbol: `AiP74LVC2G02TA8.TR`
- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`
- 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `aip74lvc2g02ta8-tr-etched.step` / `aip74lvc2g02ta8-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aip74lvc2g02ta8-tr.step` / `aip74lvc2g02ta8-tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Wuxi I core Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602997905959763968) (12 pp, sha256 `596635f584b96ed3`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/aip74lvc2g02ta8-tr-datasheet.pdf)