main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 6d ago
viewers aip74lvc245ta20-tr: viewers · Ray 6d ago
aip74lvc245ta20-tr-etched.glb Publish 0.1.0 · Ray 6d ago
aip74lvc245ta20-tr-etched.step aip74lvc245ta20-tr: factory component page (tier=lcsc) · Ray 6d ago
aip74lvc245ta20-tr-hero.glb aip74lvc245ta20-tr: hero GLB from the etched model (keeps the MPN mark) · Ray 6d ago
aip74lvc245ta20-tr-hero.overlay.json Publish 0.1.0 · Ray 6d ago
aip74lvc245ta20-tr.glb Publish 0.1.0 · Ray 6d ago
aip74lvc245ta20-tr.kicad_mod Publish 0.1.0 · Ray 6d ago
aip74lvc245ta20-tr.kicad_sym Publish 0.1.0 · Ray 6d ago
aip74lvc245ta20-tr.lbr Publish 0.1.0 · Ray 6d ago
aip74lvc245ta20-tr.step Publish 0.1.0 · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Publish 0.1.0 · Ray 6d ago

AiP74LVC245TA20.TR

Wuxi I-core Elec · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

AiP74LVC245TA20.TR from Wuxi I-core Elec, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR input Direction control input that selects the transmit/receive direction of the 8-bit bus transceiver.
2 A0 bidirectional Data input/output on the A-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
3 A1 bidirectional Data input/output on the A-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
4 A2 bidirectional Data input/output on the A-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
5 A3 bidirectional Data input/output on the A-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
6 A4 bidirectional Data input/output on the A-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
7 A5 bidirectional Data input/output on the A-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
8 A6 bidirectional Data input/output on the A-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
9 A7 bidirectional Data input/output on the A-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
10 GND power_in Ground reference (0 V).
11 B7 bidirectional Data input/output on the B-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
12 B6 bidirectional Data input/output on the B-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
13 B5 bidirectional Data input/output on the B-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
14 B4 bidirectional Data input/output on the B-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
15 B3 bidirectional Data input/output on the B-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
16 B2 bidirectional Data input/output on the B-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
17 B1 bidirectional Data input/output on the B-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
18 B0 bidirectional Data input/output on the B-side bus; outputs are 3-state and the pin accepts inputs up to 5.5 V.
19 OE input Output enable input, active low; driving it high puts the A and B bus outputs into high impedance.
20 VCC power_in Supply voltage; the recommended operating range is 1.2 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Wuxi I-core Elec
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 6.5 V 7
Input clamp current IIK -50 mA VI<0V 7
Input voltage VI -0.5 6.5 V 7
Output clamp current IOK -50 50 mA VO>VCC或VO<0V 7
Output voltage (output high or low) VO -0.5 V 输出高电平或低电平 7
Output voltage (three-state) VO -0.5 6.5 V 输出三态 7
Output current IO -50 50 mA VO=0V~VCC 7
Supply current ICC 100 mA 7
Ground current IGND -100 mA 7
Storage temperature Tstg -65 150 ℃ 7
Total power dissipation Ptot 500 mW 7
Soldering temperature TL 260 ℃ 10 秒 7
Supply voltage VCC 1.65 5.5 V 7
Functional supply voltage VCC 1.2 5.5 V 功能 7
Input voltage VI 0 5.5 V 7
Output voltage (output high or low) VO 0 V 输出高电平或低电平 7
Output voltage (three-state) VO 0 5.5 V 输出三态 7
Operating ambient temperature Tamb -40 125 ℃ 7
Input rise and fall rate Δt/ΔV 0 20 ns/V VCC=1.2V~2.7V 7
Input rise and fall rate Δt/ΔV 0 10 ns/V VCC=2.7V~3.6V 7
High-level input voltage VIH 1.08 V Tamb=-40℃~+125℃; VCC=1.2V 9
High-level input voltage VIH 1.7 V Tamb=-40℃~+125℃; VCC=2.3V~2.7V 9
High-level input voltage VIH 2 V Tamb=-40℃~+125℃; VCC=2.7V~3.6V 9
Low-level input voltage VIL 0.12 V Tamb=-40℃~+125℃; VCC=1.2V 9
Low-level input voltage VIL 0.7 V Tamb=-40℃~+125℃; VCC=2.3V~2.7V 9
Low-level input voltage VIL 0.8 V Tamb=-40℃~+125℃; VCC=2.7V~3.6V 9
High-level output voltage VOH 1.05 V Tamb=-40℃~+125℃; VI=VIH或VIL; IO=-4mA; VCC=1.65V 9
High-level output voltage VOH 1.65 V Tamb=-40℃~+125℃; VI=VIH或VIL; IO=-8mA; VCC=2.3V 9
High-level output voltage VOH 2.05 V Tamb=-40℃~+125℃; VI=VIH或VIL; IO=-12mA; VCC=2.7V 9
High-level output voltage VOH 2.25 V Tamb=-40℃~+125℃; VI=VIH或VIL; IO=-18mA; VCC=3.0V 9
High-level output voltage VOH 2 V Tamb=-40℃~+125℃; VI=VIH或VIL; IO=-24mA; VCC=3.0V 9
Low-level output voltage VOL 0.3 V Tamb=-40℃~+125℃; VI=VIH或VIL; IO=100uA; VCC=1.65V~3.6V 9
Low-level output voltage VOL 0.65 V Tamb=-40℃~+125℃; VI=VIH或VIL; IO=4mA; VCC=1.65V 9
Low-level output voltage VOL 0.8 V Tamb=-40℃~+125℃; VI=VIH或VIL; IO=8mA; VCC=2.3V 9
Low-level output voltage VOL 0.6 V Tamb=-40℃~+125℃; VI=VIH或VIL; IO=12mA; VCC=2.7V 9
Input leakage current II -20 20 uA Tamb=-40℃~+125℃; VCC=3.6V; VI=5.5V或GND 9
Off-state output current IOZ -20 20 uA Tamb=-40℃~+125℃; VCC=3.6V; VI=VIH或VIL; VO=5.5V或GND 9
Power-off leakage current IOFF -20 20 uA Tamb=-40℃~+125℃; VCC=0V; VI或VO=5.5V 9
Quiescent supply current ICC 40 uA Tamb=-40℃~+125℃; VCC=3.6V; VI=VCC或GND; IO=0A 9
Additional supply current per input pin ΔICC 5000 uA Tamb=-40℃~+125℃; 每个输入引脚; VCC=2.7V~3.6V; VI=VCC-0.6V; IO=0A 9
Propagation delay nAn to nBn / nBn to nAn tpd 1.5 16.9 ns 见图4; Tamb=-40℃~+125℃; VCC=1.65V~1.95V 11
Propagation delay nAn to nBn / nBn to nAn tpd 1 8.7 ns 见图4; Tamb=-40℃~+125℃; VCC=2.3V~2.7V 11
Propagation delay nAn to nBn / nBn to nAn tpd 1.5 9.5 ns 见图4; Tamb=-40℃~+125℃; VCC=2.7V 11
Propagation delay nAn to nBn / nBn to nAn tpd 1.5 8 ns 见图4; Tamb=-40℃~+125℃; VCC=3.0V~3.6V 11
Output enable time nOE to nAn/nBn ten 1.9 22.5 ns 见图5; Tamb=-40℃~+125℃; VCC=1.65V~1.95V 11
Output enable time nOE to nAn/nBn ten 1.5 12.4 ns 见图5; Tamb=-40℃~+125℃; VCC=2.3V~2.7V 11
Output enable time nOE to nAn/nBn ten 1.5 12 ns 见图5; Tamb=-40℃~+125℃; VCC=2.7V 11
Output enable time nOE to nAn/nBn ten 1.5 11 ns 见图5; Tamb=-40℃~+125℃; VCC=3.0V~3.6V 11
Output disable time nOE to nAn/nBn tdis 2.9 14.2 ns 见图5; Tamb=-40℃~+125℃; VCC=1.65V~1.95V 11
Output disable time nOE to nAn/nBn tdis 1 8.2 ns 见图5; Tamb=-40℃~+125℃; VCC=2.3V~2.7V 11
Output disable time nOE to nAn/nBn tdis 1.5 10 ns 见图5; Tamb=-40℃~+125℃; VCC=2.7V 11
Output disable time nOE to nAn/nBn tdis 1.7 9 ns 见图5; Tamb=-40℃~+125℃; VCC=3.0V~3.6V 11
Output skew time tsk(o) 1.5 ns Tamb=-40℃~+125℃ 11

CAD (KiCad official)

  • Symbol: AiP74LVC245TA20.TR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: aip74lvc245ta20-tr-etched.step / aip74lvc245ta20-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74lvc245ta20-tr.step / aip74lvc245ta20-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I-core Elec datasheet (17 pp, sha256 e9a084b30d5e4255, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF