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AiP74LVC244TA.TR

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Wuxi I-core Elec Buffer/Driver/Transceiver, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AiP74LVC244TA.TR

Wuxi I-core Elec · Buffer/Driver/Transceiver · TSSOP-20

AiP74LVC244TA.TR from Wuxi I-core Elec, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable input for the 1Y0 to 1Y3 bank; a HIGH level puts those outputs in the high-impedance state.
2 1A0 input Data input 1A0 of the first buffer bank, which accepts voltages up to 5.5 V.
3 2Y0 tri_state Three-state bus output 2Y0 of the second buffer bank, high impedance when 2OE is HIGH.
4 1A1 input Data input 1A1 of the first buffer bank, which accepts voltages up to 5.5 V.
5 2Y1 tri_state Three-state bus output 2Y1 of the second buffer bank, high impedance when 2OE is HIGH.
6 1A2 input Data input 1A2 of the first buffer bank, which accepts voltages up to 5.5 V.
7 2Y2 tri_state Three-state bus output 2Y2 of the second buffer bank, high impedance when 2OE is HIGH.
8 1A3 input Data input 1A3 of the first buffer bank, which accepts voltages up to 5.5 V.
9 2Y3 tri_state Three-state bus output 2Y3 of the second buffer bank, high impedance when 2OE is HIGH.
10 GND power_in Ground reference, 0 V.
11 2A3 input Data input 2A3 of the second buffer bank, which accepts voltages up to 5.5 V.
12 1Y3 tri_state Three-state bus output 1Y3 of the first buffer bank, high impedance when 1OE is HIGH.
13 2A2 input Data input 2A2 of the second buffer bank, which accepts voltages up to 5.5 V.
14 1Y2 tri_state Three-state bus output 1Y2 of the first buffer bank, high impedance when 1OE is HIGH.
15 2A1 input Data input 2A1 of the second buffer bank, which accepts voltages up to 5.5 V.
16 1Y1 tri_state Three-state bus output 1Y1 of the first buffer bank, high impedance when 1OE is HIGH.
17 2A0 input Data input 2A0 of the second buffer bank, which accepts voltages up to 5.5 V.
18 1Y0 tri_state Three-state bus output 1Y0 of the first buffer bank, high impedance when 1OE is HIGH.
19 2OE input Active-low output enable input for the 2Y0 to 2Y3 bank; a HIGH level puts those outputs in the high-impedance state.
20 VCC power_in Supply voltage, functional from 1.2 V to 3.6 V and recommended from 1.65 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer Wuxi I-core Elec
Package TSSOP-20
Category Logic ICs
Pins 20

CAD (KiCad official)

  • Symbol: AiP74LVC244TA.TR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: aip74lvc244ta-tr-etched.step / aip74lvc244ta-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74lvc244ta-tr.step / aip74lvc244ta-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I-core Elec datasheet (16 pp, sha256 1a2c364d4b3734ba, retrieved 2026-10-28, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF