component
AiP74LVC1G123YA8.TR
Public Made by Adomby adom
Wuxi I core Elec Buffers, Drivers, Receivers, Transceivers, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AiP74LVC1G123YA8.TR
Wuxi I core Elec · Buffers, Drivers, Receivers, Transceivers · VSSOP-8
AiP74LVC1G123YA8.TR from Wuxi I core Elec, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Falling-edge trigger input; the datasheet specifies input voltage range 0 to 5.5 V and Schmitt-trigger inputs. |
| 2 | B | input | Rising-edge trigger input; the datasheet specifies input voltage range 0 to 5.5 V and Schmitt-trigger inputs. |
| 3 | CLR | input | Active-low reset and rising-edge trigger input; the datasheet specifies input voltage range 0 to 5.5 V and Schmitt-trigger inputs. |
| 4 | GND | power_in | Ground reference (0 V). |
| 5 | Q | output | Non-inverted output; the datasheet rates the output drive at ±24 mA at VCC = 3.0 V. |
| 6 | CEXT | passive | External timing capacitor connection; used with REXT/CEXT to set the base output pulse width. |
| 7 | REXT/CEXT | passive | External timing resistor and capacitor connection; REXT must be at least 1 kΩ for VCC ≥ 3.0 V and at least 5 kΩ for VCC = 2.0 V. |
| 8 | VCC | power_in | Supply voltage, recommended range 1.65 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | VSSOP-8 |
| Category | Logic |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 6.5 | V | 7 | ||
| Input voltage | VI | -0.5 | 6.5 | V | 7 | ||
| Output voltage, operating mode | VO | -0.5 | V | Operating mode; upper limit printed as VCC+0.5 | 7 | ||
| Output voltage, power-down mode | VO | -0.5 | 6.5 | V | Power-down mode | 7 | |
| Input clamp current | IIK | -50 | mA | VI<0V | 7 | ||
| Output clamp current | IOK | -50 | 50 | mA | VO<0V or VO>VCC | 7 | |
| Output current | IO | -50 | 50 | mA | VO=0V~VCC | 7 | |
| Supply current | ICC | 100 | mA | 7 | |||
| Ground current | IGND | -100 | mA | 7 | |||
| Operating ambient temperature | Tamb | -40 | 105 | °C | 7 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 7 | ||
| Total power dissipation | Ptot | 300 | mW | 7 | |||
| Soldering temperature | TL | 260 | °C | 10 s | 7 | ||
| Supply voltage | VCC | 1.65 | 5.5 | V | 7 | ||
| Input voltage | VI | 0 | 5.5 | V | 7 | ||
| Output voltage, operating mode | VO | 0 | V | Operating mode; upper limit printed as VCC | 7 | ||
| Output voltage, power-down mode | VO | 0 | 5.5 | V | Power-down mode | 7 | |
| Operating ambient temperature | Tamb | -40 | 105 | °C | 7 | ||
| High-level output voltage | VOH | 1.2 | V | VI=VT+ or VT-; IO=-4mA; VCC=1.65V | 9 | ||
| High-level output voltage | VOH | 1.9 | V | VI=VT+ or VT-; IO=-8mA; VCC=2.3V | 9 | ||
| High-level output voltage | VOH | 2.2 | V | VI=VT+ or VT-; IO=-12mA; VCC=2.7V | 9 | ||
| High-level output voltage | VOH | 2.4 | V | VI=VT+ or VT-; IO=-24mA; VCC=3.0V | 9 | ||
| High-level output voltage | VOH | 3.8 | V | VI=VT+ or VT-; IO=-32mA; VCC=4.5V | 9 | ||
| Low-level output voltage | VOL | 0.1 | V | VI=VT+ or VT-; IO=100uA; VCC=1.65V~5.5V | 9 | ||
| Low-level output voltage | VOL | 0.45 | V | VI=VT+ or VT-; IO=4mA; VCC=1.65V | 9 | ||
| Low-level output voltage | VOL | 0.3 | V | VI=VT+ or VT-; IO=8mA; VCC=2.3V | 9 | ||
| Low-level output voltage | VOL | 0.4 | V | VI=VT+ or VT-; IO=12mA; VCC=2.7V | 9 | ||
| Low-level output voltage | VOL | 0.55 | V | VI=VT+ or VT-; IO=24mA; VCC=3.0V | 9 | ||
| Input leakage current | II | -10 | 10 | uA | VI=5.5V or GND; VCC=0V~5.5V | 9 | |
| Power-off leakage current | IOFF | -10 | 10 | uA | VI or VO=5.5V; VCC=0V | 9 | |
| Supply current, static | ICC | 20 | uA | VI=5.5V or GND; static; VCC=1.65V~5.5V; IO=0A | 9 | ||
| Supply current, operating | ICC | 80 | uA | Operating; REXT/CEXT=0.5VCC; VCC=1.65V | 9 | ||
| Supply current, operating | ICC | 130 | uA | Operating; REXT/CEXT=0.5VCC; VCC=2.3V | 9 | ||
| Supply current, operating | ICC | 240 | uA | Operating; REXT/CEXT=0.5VCC; VCC=3V | 9 | ||
| Supply current, operating | ICC | 400 | uA | Operating; REXT/CEXT=0.5VCC; VCC=4.5V | 9 | ||
| Supply current, operating | ICC | 650 | uA | Operating; REXT/CEXT=0.5VCC; VCC=5.5V | 9 | ||
| Positive-going threshold voltage | VT+ | 0.71 | 1.22 | V | A, B, CLR inputs; VCC=1.65V~1.95V | 10 | |
| Positive-going threshold voltage | VT+ | 0.97 | 1.52 | V | A, B, CLR inputs; VCC=2.3V~2.7V | 10 | |
| Positive-going threshold voltage | VT+ | 1.2 | 1.9 | V | A, B, CLR inputs; VCC=3.0V~3.6V | 10 | |
| Positive-going threshold voltage | VT+ | 1.74 | 2.78 | V | A, B, CLR inputs; VCC=4.5V~5.5V | 10 | |
| Negative-going threshold voltage | VT- | 0.56 | 1.04 | V | A, B, CLR inputs; VCC=1.65V~1.95V | 10 | |
| Negative-going threshold voltage | VT- | 0.82 | 1.33 | V | A, B, CLR inputs; VCC=2.3V~2.7V | 10 | |
| Negative-going threshold voltage | VT- | 1.08 | 1.72 | V | A, B, CLR inputs; VCC=3.0V~3.6V | 10 | |
| Negative-going threshold voltage | VT- | 1.61 | 2.57 | V | A, B, CLR inputs; VCC=4.5V~5.5V | 10 | |
| Hysteresis voltage | VH | 54 | 295 | mV | A, B, CLR inputs (VT+-VT-); VCC=1.65V~1.95V | 10 | |
| Hysteresis voltage | VH | 41 | 304 | mV | A, B, CLR inputs (VT+-VT-); VCC=2.3V~2.7V | 10 | |
| Hysteresis voltage | VH | 40 | 319 | mV | A, B, CLR inputs (VT+-VT-); VCC=3.0V~3.6V | 10 | |
| Hysteresis voltage | VH | 26 | 363 | mV | A, B, CLR inputs (VT+-VT-); VCC=4.5V~5.5V | 10 | |
| Propagation delay A, B to Q | tPHL, tPLH | 2.5 | 17.6 | ns | CL=15pF; VCC=1.65V~1.95V | 13 | |
| Propagation delay A, B to Q | tPHL, tPLH | 1.9 | 11.2 | ns | CL=15pF; VCC=2.3V~2.7V | 13 | |
| Propagation delay A, B to Q | tPHL, tPLH | 1.9 | 9.3 | ns | CL=15pF; VCC=2.7V | 13 | |
| Propagation delay A, B to Q | tPHL, tPLH | 1.5 | 8.3 | ns | CL=15pF; VCC=3.0V~3.6V | 13 | |
| Propagation delay A, B to Q | tPHL, tPLH | 1.2 | 5.8 | ns | CL=15pF; VCC=4.5V~5.5V | 13 | |
| Output Q high pulse width | tW | 2.2 | us | Q output high; REXT=10kΩ; CEXT=100pF; VCC=1.65V~1.95V | 14 | ||
| Output Q high pulse width | tW | 1.8 | us | Q output high; REXT=10kΩ; CEXT=100pF; VCC=2.3V~2.7V | 14 |
CAD (KiCad official)
- Symbol:
AiP74LVC1G123YA8.TR - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
aip74lvc1g123ya8-tr-etched.step/aip74lvc1g123ya8-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);aip74lvc1g123ya8-tr.step/aip74lvc1g123ya8-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I core Elec datasheet (22 pp, sha256
d93024ff3fb1a2df, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AiP74LVC1G123YA8.TR
**Wuxi I core Elec** · Buffers, Drivers, Receivers, Transceivers · VSSOP-8
AiP74LVC1G123YA8.TR from Wuxi I core Elec, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Falling-edge trigger input; the datasheet specifies input voltage range 0 to 5.5 V and Schmitt-trigger inputs. |
| 2 | B | input | Rising-edge trigger input; the datasheet specifies input voltage range 0 to 5.5 V and Schmitt-trigger inputs. |
| 3 | CLR | input | Active-low reset and rising-edge trigger input; the datasheet specifies input voltage range 0 to 5.5 V and Schmitt-trigger inputs. |
| 4 | GND | power_in | Ground reference (0 V). |
| 5 | Q | output | Non-inverted output; the datasheet rates the output drive at ±24 mA at VCC = 3.0 V. |
| 6 | CEXT | passive | External timing capacitor connection; used with REXT/CEXT to set the base output pulse width. |
| 7 | REXT/CEXT | passive | External timing resistor and capacitor connection; REXT must be at least 1 kΩ for VCC ≥ 3.0 V and at least 5 kΩ for VCC = 2.0 V. |
| 8 | VCC | power_in | Supply voltage, recommended range 1.65 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | VSSOP-8 |
| Category | Logic |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | | 6.5 | V | | 7 |
| Input voltage | VI | -0.5 | | 6.5 | V | | 7 |
| Output voltage, operating mode | VO | -0.5 | | | V | Operating mode; upper limit printed as VCC+0.5 | 7 |
| Output voltage, power-down mode | VO | -0.5 | | 6.5 | V | Power-down mode | 7 |
| Input clamp current | IIK | -50 | | | mA | VI<0V | 7 |
| Output clamp current | IOK | -50 | | 50 | mA | VO<0V or VO>VCC | 7 |
| Output current | IO | -50 | | 50 | mA | VO=0V~VCC | 7 |
| Supply current | ICC | | | 100 | mA | | 7 |
| Ground current | IGND | -100 | | | mA | | 7 |
| Operating ambient temperature | Tamb | -40 | | 105 | °C | | 7 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 7 |
| Total power dissipation | Ptot | | | 300 | mW | | 7 |
| Soldering temperature | TL | | | 260 | °C | 10 s | 7 |
| Supply voltage | VCC | 1.65 | | 5.5 | V | | 7 |
| Input voltage | VI | 0 | | 5.5 | V | | 7 |
| Output voltage, operating mode | VO | 0 | | | V | Operating mode; upper limit printed as VCC | 7 |
| Output voltage, power-down mode | VO | 0 | | 5.5 | V | Power-down mode | 7 |
| Operating ambient temperature | Tamb | -40 | | 105 | °C | | 7 |
| High-level output voltage | VOH | 1.2 | | | V | VI=VT+ or VT-; IO=-4mA; VCC=1.65V | 9 |
| High-level output voltage | VOH | 1.9 | | | V | VI=VT+ or VT-; IO=-8mA; VCC=2.3V | 9 |
| High-level output voltage | VOH | 2.2 | | | V | VI=VT+ or VT-; IO=-12mA; VCC=2.7V | 9 |
| High-level output voltage | VOH | 2.4 | | | V | VI=VT+ or VT-; IO=-24mA; VCC=3.0V | 9 |
| High-level output voltage | VOH | 3.8 | | | V | VI=VT+ or VT-; IO=-32mA; VCC=4.5V | 9 |
| Low-level output voltage | VOL | | | 0.1 | V | VI=VT+ or VT-; IO=100uA; VCC=1.65V~5.5V | 9 |
| Low-level output voltage | VOL | | | 0.45 | V | VI=VT+ or VT-; IO=4mA; VCC=1.65V | 9 |
| Low-level output voltage | VOL | | | 0.3 | V | VI=VT+ or VT-; IO=8mA; VCC=2.3V | 9 |
| Low-level output voltage | VOL | | | 0.4 | V | VI=VT+ or VT-; IO=12mA; VCC=2.7V | 9 |
| Low-level output voltage | VOL | | | 0.55 | V | VI=VT+ or VT-; IO=24mA; VCC=3.0V | 9 |
| Input leakage current | II | -10 | | 10 | uA | VI=5.5V or GND; VCC=0V~5.5V | 9 |
| Power-off leakage current | IOFF | -10 | | 10 | uA | VI or VO=5.5V; VCC=0V | 9 |
| Supply current, static | ICC | | | 20 | uA | VI=5.5V or GND; static; VCC=1.65V~5.5V; IO=0A | 9 |
| Supply current, operating | ICC | | | 80 | uA | Operating; REXT/CEXT=0.5VCC; VCC=1.65V | 9 |
| Supply current, operating | ICC | | | 130 | uA | Operating; REXT/CEXT=0.5VCC; VCC=2.3V | 9 |
| Supply current, operating | ICC | | | 240 | uA | Operating; REXT/CEXT=0.5VCC; VCC=3V | 9 |
| Supply current, operating | ICC | | | 400 | uA | Operating; REXT/CEXT=0.5VCC; VCC=4.5V | 9 |
| Supply current, operating | ICC | | | 650 | uA | Operating; REXT/CEXT=0.5VCC; VCC=5.5V | 9 |
| Positive-going threshold voltage | VT+ | 0.71 | | 1.22 | V | A, B, CLR inputs; VCC=1.65V~1.95V | 10 |
| Positive-going threshold voltage | VT+ | 0.97 | | 1.52 | V | A, B, CLR inputs; VCC=2.3V~2.7V | 10 |
| Positive-going threshold voltage | VT+ | 1.2 | | 1.9 | V | A, B, CLR inputs; VCC=3.0V~3.6V | 10 |
| Positive-going threshold voltage | VT+ | 1.74 | | 2.78 | V | A, B, CLR inputs; VCC=4.5V~5.5V | 10 |
| Negative-going threshold voltage | VT- | 0.56 | | 1.04 | V | A, B, CLR inputs; VCC=1.65V~1.95V | 10 |
| Negative-going threshold voltage | VT- | 0.82 | | 1.33 | V | A, B, CLR inputs; VCC=2.3V~2.7V | 10 |
| Negative-going threshold voltage | VT- | 1.08 | | 1.72 | V | A, B, CLR inputs; VCC=3.0V~3.6V | 10 |
| Negative-going threshold voltage | VT- | 1.61 | | 2.57 | V | A, B, CLR inputs; VCC=4.5V~5.5V | 10 |
| Hysteresis voltage | VH | 54 | | 295 | mV | A, B, CLR inputs (VT+-VT-); VCC=1.65V~1.95V | 10 |
| Hysteresis voltage | VH | 41 | | 304 | mV | A, B, CLR inputs (VT+-VT-); VCC=2.3V~2.7V | 10 |
| Hysteresis voltage | VH | 40 | | 319 | mV | A, B, CLR inputs (VT+-VT-); VCC=3.0V~3.6V | 10 |
| Hysteresis voltage | VH | 26 | | 363 | mV | A, B, CLR inputs (VT+-VT-); VCC=4.5V~5.5V | 10 |
| Propagation delay A, B to Q | tPHL, tPLH | 2.5 | | 17.6 | ns | CL=15pF; VCC=1.65V~1.95V | 13 |
| Propagation delay A, B to Q | tPHL, tPLH | 1.9 | | 11.2 | ns | CL=15pF; VCC=2.3V~2.7V | 13 |
| Propagation delay A, B to Q | tPHL, tPLH | 1.9 | | 9.3 | ns | CL=15pF; VCC=2.7V | 13 |
| Propagation delay A, B to Q | tPHL, tPLH | 1.5 | | 8.3 | ns | CL=15pF; VCC=3.0V~3.6V | 13 |
| Propagation delay A, B to Q | tPHL, tPLH | 1.2 | | 5.8 | ns | CL=15pF; VCC=4.5V~5.5V | 13 |
| Output Q high pulse width | tW | | | 2.2 | us | Q output high; REXT=10kΩ; CEXT=100pF; VCC=1.65V~1.95V | 14 |
| Output Q high pulse width | tW | | | 1.8 | us | Q output high; REXT=10kΩ; CEXT=100pF; VCC=2.3V~2.7V | 14 |
## CAD (KiCad official)
- Symbol: `AiP74LVC1G123YA8.TR`
- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`
- 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `aip74lvc1g123ya8-tr-etched.step` / `aip74lvc1g123ya8-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aip74lvc1g123ya8-tr.step` / `aip74lvc1g123ya8-tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Wuxi I core Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602997907075719168) (22 pp, sha256 `d93024ff3fb1a2df`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/aip74lvc1g123ya8-tr-datasheet.pdf)