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AiP74LVC1G00GC353.TR

Wuxi I core Elec · Logic Gates · SOT-353

AiP74LVC1G00GC353.TR from Wuxi I core Elec, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Data input B of the NAND gate; the datasheet states inputs accept voltages up to 5V, with recommended input voltage 0 to 5.5V.
2 A input Data input A of the NAND gate; the datasheet states inputs accept voltages up to 5V, with recommended input voltage 0 to 5.5V.
3 GND power_in Ground (0V) reference for all voltages on the device.
4 Y output Data output of the NAND gate; in active mode the output voltage is limited to 0 to VCC and the output current is ±50mA absolute maximum.
5 VCC power_in Supply voltage; recommended range is 1.65V to 5.5V.

Key specifications

Parameter Value
Manufacturer Wuxi I core Elec
Package SOT-353
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 6.5 V 4
input clamping current IIK -50 mA VI < 0V 4
input voltage VI -0.5 6.5 V 4
output clamping current IOK -50 50 mA VO > VCC or VO < 0V 4
output voltage VO -0.5 V Active mode 4
output voltage VO -0.5 6.5 V Power-down mode 4
output current IO -50 50 mA VO=0V to VCC 4
supply current ICC 100 mA 4
ground current IGND -100 mA 4
storage temperature Tstg -65 150 ℃ 4
total power dissipation Ptot 250 mW 4
soldering temperature TL 250 ℃ 10s 4
supply voltage VCC 1.65 5.5 V 4
input voltage VI 0 5.5 V 4
output voltage VO 0 V Active mode 4
output voltage VO 0 5.5 V Power-down mode; VCC=0V 4
ambient temperature Tamb -40 105 ℃ 4
input transition rise and fall rate Δt/ΔV 20 ns/V VCC=1.65V to 2.7V 4
input transition rise and fall rate Δt/ΔV 10 ns/V VCC=2.7V to 5.5V 4
HIGH-level input voltage VIH 1.7 V Tamb=-40℃ to +105℃; VCC=2.3V to 2.7V 6
HIGH-level input voltage VIH 2 V Tamb=-40℃ to +105℃; VCC=2.7V to 3.6V 6
LOW-level input voltage VIL 0.7 V Tamb=-40℃ to +105℃; VCC=2.3V to 2.7V 6
LOW-level input voltage VIL 0.8 V Tamb=-40℃ to +105℃; VCC=2.7V to 3.6V 6
HIGH-level output voltage VOH 0.95 V Tamb=-40℃ to +105℃; IO=-4mA; VCC=1.65V 6
HIGH-level output voltage VOH 1.7 V Tamb=-40℃ to +105℃; IO=-8mA; VCC=2.3V 6
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +105℃; IO=-12mA; VCC=2.7V 6
HIGH-level output voltage VOH 2 V Tamb=-40℃ to +105℃; IO=-24mA; VCC=3.0V 6
HIGH-level output voltage VOH 3.4 V Tamb=-40℃ to +105℃; IO=-32mA; VCC=4.5V 6
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +105℃; IO=100uA; VCC=1.65V to 5.5V 6
LOW-level output voltage VOL 0.7 V Tamb=-40℃ to +105℃; IO=4mA; VCC=1.65V 6
LOW-level output voltage VOL 0.45 V Tamb=-40℃ to +105℃; IO=8mA; VCC=2.3V 6
LOW-level output voltage VOL 0.6 V Tamb=-40℃ to +105℃; IO=12mA; VCC=2.7V 6
LOW-level output voltage VOL 0.8 V Tamb=-40℃ to +105℃; IO=24mA; VCC=3.0V 6
input leakage current II -1 1 uA Tamb=-40℃ to +105℃; VI=5.5V or GND; VCC=0V to 5.5V 6
power-off leakage current IOFF -2 2 uA Tamb=-40℃ to +105℃; VI or VO=5.5V; VCC=0V 6
supply current ICC 4 uA Tamb=-40℃ to +105℃; VI=5.5V or GND; IO=0A; VCC=1.65V to 5.5V 6
additional supply current ΔICC 500 uA Tamb=-40℃ to +105℃; per pin; VI=VCC-0.6V; IO=0A; VCC=2.3V to 5.5V 6
A, B to Y propagation delay tpd 1 10.5 ns Tamb=-40℃ to +105℃; see Figure 5; VCC=1.65V to 1.95V 7
A, B to Y propagation delay tpd 0.5 7 ns Tamb=-40℃ to +105℃; see Figure 5; VCC=2.3V to 2.7V 7
A, B to Y propagation delay tpd 0.5 7.5 ns Tamb=-40℃ to +105℃; see Figure 5; VCC=2.7V 7
A, B to Y propagation delay tpd 0.5 6 ns Tamb=-40℃ to +105℃; see Figure 5; VCC=3.0V to 3.6V 7
A, B to Y propagation delay tpd 0.5 5.5 ns Tamb=-40℃ to +105℃; see Figure 5; VCC=4.5V to 5.5V 7

CAD (KiCad official)

  • Symbol: AiP74LVC1G00GC353.TR
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)
  • 3D model files: aip74lvc1g00gc353-tr-etched.step / aip74lvc1g00gc353-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74lvc1g00gc353-tr.step / aip74lvc1g00gc353-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I core Elec datasheet (12 pp, sha256 ea8285749b5ca2d4, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF