# AiP74LVC138TA16.TB

**Wuxi I-core Elec** · Signal Switches, Multiplexers, Decoders · TSSOP-16

AiP74LVC138TA16.TB from Wuxi I-core Elec, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Binary weighted address input A0; with the enables active it selects which of the eight outputs goes LOW. |
| 2 | A1 | input | Binary weighted address input A1; with the enables active it selects which of the eight outputs goes LOW. |
| 3 | A2 | input | Binary weighted address input A2; with the enables active it selects which of the eight outputs goes LOW. |
| 4 | E1 | input | Enable input, active LOW; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 5 | E2 | input | Enable input, active LOW; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 6 | E3 | input | Enable input, active HIGH; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 7 | Y7 | output | Mutually exclusive active-LOW decoder output 7; HIGH unless selected. |
| 8 | GND | power_in | Ground (0V) reference for all voltages. |
| 9 | Y6 | output | Mutually exclusive active-LOW decoder output 6; HIGH unless selected. |
| 10 | Y5 | output | Mutually exclusive active-LOW decoder output 5; HIGH unless selected. |
| 11 | Y4 | output | Mutually exclusive active-LOW decoder output 4; HIGH unless selected. |
| 12 | Y3 | output | Mutually exclusive active-LOW decoder output 3; HIGH unless selected. |
| 13 | Y2 | output | Mutually exclusive active-LOW decoder output 2; HIGH unless selected. |
| 14 | Y1 | output | Mutually exclusive active-LOW decoder output 1; HIGH unless selected. |
| 15 | Y0 | output | Mutually exclusive active-LOW decoder output 0; HIGH unless selected. |
| 16 | VCC | power_in | Supply voltage; recommended operating range is 1.65 V to 3.6 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I-core Elec |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 |  | 6.5 | V |  | 6 |
| input clamping current | IIK | -50 |  |  | mA | VI < 0V | 6 |
| input voltage | VI | -0.5 |  | 6.5 | V |  | 6 |
| output clamping current | IOK | -50 |  | 50 | mA | VO > VCC or VO < 0V | 6 |
| output voltage | VO | -0.5 |  |  | V | output HIGH or LOW state; upper limit printed as VCC+0.5 V | 6 |
| output current | IO | -50 |  | 50 | mA | VO=0V to VCC | 6 |
| supply current | ICC |  |  | 100 | mA |  | 6 |
| ground current | IGND | -100 |  |  | mA |  | 6 |
| total power dissipation | Ptot |  |  | 500 | mW |  | 6 |
| storage temperature | Tstg | -65 |  | 150 | ℃ |  | 6 |
| supply voltage | VCC | 1.65 |  | 3.6 | V |  | 7 |
| functional supply voltage | VCC | 1.2 |  |  | V | functional | 7 |
| input voltage | VI | 0 |  | 5.5 | V |  | 7 |
| output voltage | VO | 0 |  |  | V | output HIGH or LOW-state; upper limit printed as VCC | 7 |
| ambient temperature | Tamb | -40 |  | 105 | ℃ |  | 7 |
| input transition rise and fall rate | Δt/ΔV | 0 |  | 20 | ns/V | VCC=1.65V to 2.7V | 7 |
| input transition rise and fall rate | Δt/ΔV | 0 |  | 10 | ns/V | VCC=2.7V to 3.6V | 7 |
| HIGH-level input voltage | VIH | 1.08 |  |  | V | VCC=1.2V | 8 |
| HIGH-level input voltage | VIH | 0.65 |  |  | ×VCC | VCC=1.65V to 1.95V | 8 |
| HIGH-level input voltage | VIH | 1.7 |  |  | V | VCC=2.3V to 2.7V | 8 |
| HIGH-level input voltage | VIH | 2 |  |  | V | VCC=2.7V to 3.6V | 8 |
| LOW-level input voltage | VIL |  |  | 0.12 | V | VCC=1.2V | 8 |
| LOW-level input voltage | VIL |  |  | 0.35 | ×VCC | VCC=1.65V to 1.95V | 8 |
| LOW-level input voltage | VIL |  |  | 0.7 | V | VCC=2.3V to 2.7V | 8 |
| LOW-level input voltage | VIL |  |  | 0.8 | V | VCC=2.7V to 3.6V | 8 |
| HIGH-level output voltage | VOH | 1.05 |  |  | V | IO=-4mA; VCC=1.65V | 8 |
| HIGH-level output voltage | VOH | 1.65 |  |  | V | IO=-8mA; VCC=2.3V | 8 |
| HIGH-level output voltage | VOH | 2.05 |  |  | V | IO=-12mA; VCC=2.7V | 8 |
| HIGH-level output voltage | VOH | 2.25 |  |  | V | IO=-18mA; VCC=3.0V | 8 |
| HIGH-level output voltage | VOH | 2 |  |  | V | IO=-24mA; VCC=3.0V | 8 |
| LOW-level output voltage | VOL |  |  | 0.3 | V | IO=100uA; VCC=1.65V to 3.6V | 8 |
| LOW-level output voltage | VOL |  |  | 0.65 | V | IO=4mA; VCC=1.65V | 8 |
| LOW-level output voltage | VOL |  |  | 0.8 | V | IO=8mA; VCC=2.3V | 8 |
| LOW-level output voltage | VOL |  |  | 0.6 | V | IO=12mA; VCC=2.7V | 8 |
| input leakage current | II | -20 |  | 20 | uA | VI=5.5V or GND; VCC=3.6V | 8 |
| supply current | ICC |  |  | 40 | uA | VI=VCC or GND; IO=0A; VCC=3.6V | 8 |
| additional supply current | ΔICC |  |  | 5000 | uA | per input pin; VI=VCC-0.6V; IO=0A; VCC=2.7V to 3.6V | 8 |
| propagation delay An to Yn | tpd | 0.5 |  | 12.7 | ns | An to Yn; VCC=1.65V to 1.95V; see Figure 5 | 10 |
| propagation delay An to Yn | tpd | 1.5 |  | 7.3 | ns | An to Yn; VCC=2.3V to 2.7V; see Figure 5 | 10 |
| propagation delay An to Yn | tpd | 1.5 |  | 8.5 | ns | An to Yn; VCC=2.7V; see Figure 5 | 10 |
| propagation delay An to Yn | tpd | 1 |  | 7.5 | ns | An to Yn; VCC=3.0V to 3.6V; see Figure 5 | 10 |
| propagation delay E3 to Yn | tpd | 1 |  | 12.5 | ns | E3 to Yn; VCC=1.65V to 1.95V; see Figure 5 | 10 |
| propagation delay E3 to Yn | tpd | 1.5 |  | 7.1 | ns | E3 to Yn; VCC=2.3V to 2.7V; see Figure 5 | 10 |
| propagation delay E3 to Yn | tpd | 1.5 |  | 8.5 | ns | E3 to Yn; VCC=2.7V; see Figure 5 | 10 |
| propagation delay E3 to Yn | tpd | 1 |  | 7.5 | ns | E3 to Yn; VCC=3.0V to 3.6V; see Figure 5 | 10 |
| propagation delay En to Yn | tpd | 1 |  | 12.8 | ns | En to Yn; VCC=1.65V to 1.95V; see Figure 6 | 10 |
| propagation delay En to Yn | tpd | 1.8 |  | 7.3 | ns | En to Yn; VCC=2.3V to 2.7V; see Figure 6 | 10 |
| propagation delay En to Yn | tpd | 1.5 |  | 8 | ns | En to Yn; VCC=2.7V; see Figure 6 | 10 |
| propagation delay En to Yn | tpd | 1 |  | 7.5 | ns | En to Yn; VCC=3.0V to 3.6V; see Figure 6 | 10 |
| output skew time | tsk(o) |  |  | 1.5 | ns |  | 10 |

## CAD (KiCad official)

- Symbol: `AiP74LVC138TA16.TB`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `aip74lvc138ta16-tb-etched.step` / `aip74lvc138ta16-tb-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aip74lvc138ta16-tb.step` / `aip74lvc138ta16-tb.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Wuxi I-core Elec datasheet](docs/aip74lvc138ta16-tb-datasheet.pdf) (16 pp, sha256 `5ebc1b4f20af46ee`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/aip74lvc138ta16-tb-datasheet.pdf)