component
Aip74LVC07TA14.TR
Public Made by Adomby adom
Wuxi I core Elec Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Aip74LVC07TA14.TR
Wuxi I core Elec · Buffers, Drivers, Receivers, Transceivers · TSSOP-14
Aip74LVC07TA14.TR from Wuxi I core Elec, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of buffer 1; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 2 | 1Y | output | Open-drain data output of buffer 1 that follows the 1A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 3 | 2A | input | Data input of buffer 2; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 4 | 2Y | output | Open-drain data output of buffer 2 that follows the 2A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 5 | 3A | input | Data input of buffer 3; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 6 | 3Y | output | Open-drain data output of buffer 3 that follows the 3A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 7 | GND | power_in | Ground reference (0 V) for all voltages in the datasheet. |
| 8 | 4Y | output | Open-drain data output of buffer 4 that follows the 4A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 9 | 4A | input | Data input of buffer 4; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 10 | 5Y | output | Open-drain data output of buffer 5 that follows the 5A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 11 | 5A | input | Data input of buffer 5; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 12 | 6Y | output | Open-drain data output of buffer 6 that follows the 6A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 13 | 6A | input | Data input of buffer 6; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 14 | VCC | power_in | Supply voltage; recommended range 1.65 V to 5.5 V, functional down to 1.2 V, absolute maximum 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 6.5 | V | 5 | ||
| input clamping current | IIK | -50 | mA | VI<0V | 5 | ||
| input voltage | VI | -0.5 | 6.5 | V | 5 | ||
| output clamping current | IOK | -50 | mA | VO<0V | 5 | ||
| output voltage | VO | -0.5 | 6.5 | V | active mode | 5 | |
| output current | IO | 50 | mA | VO=0V to VCC | 5 | ||
| supply current | ICC | 100 | mA | 5 | |||
| ground current | IGND | -100 | mA | 5 | |||
| total power dissipation | Ptot | 500 | mW | 5 | |||
| storage temperature | Tstg | -65 | 150 | ℃ | 5 | ||
| supply voltage | VCC | 1.65 | 5.5 | V | 5 | ||
| functional supply voltage | 1.2 | V | 5 | ||||
| input voltage | VI | 0 | 5.5 | V | 5 | ||
| output voltage | VO | 0 | V | active mode | 5 | ||
| output voltage | VO | 0 | 5.5 | V | high-impedance mode | 5 | |
| ambient temperature | Tamb | -40 | 105 | ℃ | 5 | ||
| input transition rise and fall rate | Δt/ΔV | 0 | 20 | ns/V | VCC=1.65V to 2.7V | 5 | |
| input transition rise and fall rate | Δt/ΔV | 0 | 10 | ns/V | VCC=2.7V to 3.6V | 5 | |
| HIGH-level input voltage | VIH | 1.08 | V | VCC=1.2V | 7 | ||
| HIGH-level input voltage | VIH | 1.7 | V | VCC=2.3V to 2.7V | 7 | ||
| HIGH-level input voltage | VIH | 2 | V | VCC=2.7V to 3.6V | 7 | ||
| LOW-level input voltage | VIL | 0.12 | V | VCC=1.2V | 7 | ||
| LOW-level input voltage | VIL | 0.7 | V | VCC=2.3V to 2.7V | 7 | ||
| LOW-level input voltage | VIL | 0.8 | V | VCC=2.7V to 3.6V | 7 | ||
| LOW-level output voltage | VOL | 0.3 | V | VI=VIH or VIL; IO=100uA; VCC=1.65V to 5.5V | 7 | ||
| LOW-level output voltage | VOL | 0.6 | V | VI=VIH or VIL; IO=4mA; VCC=1.65V | 7 | ||
| LOW-level output voltage | VOL | 0.75 | V | VI=VIH or VIL; IO=8mA; VCC=2.3V | 7 | ||
| LOW-level output voltage | VOL | 0.8 | V | VI=VIH or VIL; IO=24mA; VCC=3.0V | 7 | ||
| input leakage current | II | -20 | 20 | uA | VI=5.5V or GND; VCC=1.65V to 5.5V | 7 | |
| OFF-state output current | IOZ | -20 | 20 | uA | VI=VIH; VO=5.5V or GND; VCC=1.65V to 5.5V | 7 | |
| power-off leakage current | IOFF | -20 | 20 | uA | VI or VO=5.5V; VCC=0V | 7 | |
| supply current | ICC | 40 | uA | VI=VCC or GND; IO=0A; VCC=5.5V | 7 | ||
| additional supply current | ΔICC | 5000 | uA | per input pin; VI=VCC-0.6V; IO=0A; VCC=2.7V to 5.5V | 7 | ||
| nA to nY OFF-state to LOW propagation delay | tPZL | 0.5 | 6.5 | ns | see Figure 5; VCC=1.65V to 1.95V | 8 | |
| nA to nY OFF-state to LOW propagation delay | tPZL | 0.5 | 3.5 | ns | see Figure 5; VCC=2.3V to 2.7V | 8 | |
| nA to nY OFF-state to LOW propagation delay | tPZL | 0.5 | 4.5 | ns | see Figure 5; VCC=2.7V | 8 | |
| nA to nY LOW to OFF-state propagation delay | tPLZ | 0.5 | 6.5 | ns | see Figure 5; VCC=1.65V to 1.95V | 8 | |
| nA to nY LOW to OFF-state propagation delay | tPLZ | 0.5 | 3.5 | ns | see Figure 5; VCC=2.3V to 2.7V | 8 | |
| nA to nY LOW to OFF-state propagation delay | tPLZ | 0.5 | 4.5 | ns | see Figure 5; VCC=2.7V | 8 |
CAD (KiCad official)
- Symbol:
Aip74LVC07TA14.TR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
aip74lvc07ta14-tr-etched.step/aip74lvc07ta14-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);aip74lvc07ta14-tr.step/aip74lvc07ta14-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I core Elec datasheet (14 pp, sha256
63af2901a7a2ddd9, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# Aip74LVC07TA14.TR
**Wuxi I core Elec** · Buffers, Drivers, Receivers, Transceivers · TSSOP-14
Aip74LVC07TA14.TR from Wuxi I core Elec, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of buffer 1; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 2 | 1Y | output | Open-drain data output of buffer 1 that follows the 1A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 3 | 2A | input | Data input of buffer 2; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 4 | 2Y | output | Open-drain data output of buffer 2 that follows the 2A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 5 | 3A | input | Data input of buffer 3; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 6 | 3Y | output | Open-drain data output of buffer 3 that follows the 3A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 7 | GND | power_in | Ground reference (0 V) for all voltages in the datasheet. |
| 8 | 4Y | output | Open-drain data output of buffer 4 that follows the 4A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 9 | 4A | input | Data input of buffer 4; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 10 | 5Y | output | Open-drain data output of buffer 5 that follows the 5A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 11 | 5A | input | Data input of buffer 5; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 12 | 6Y | output | Open-drain data output of buffer 6 that follows the 6A input (L gives L, H gives high-impedance Z); absolute maximum output current is 50 mA. |
| 13 | 6A | input | Data input of buffer 6; recommended input voltage is 0 to 5.5 V and the absolute maximum is -0.5 to +6.5 V. |
| 14 | VCC | power_in | Supply voltage; recommended range 1.65 V to 5.5 V, functional down to 1.2 V, absolute maximum 6.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | | 6.5 | V | | 5 |
| input clamping current | IIK | -50 | | | mA | VI<0V | 5 |
| input voltage | VI | -0.5 | | 6.5 | V | | 5 |
| output clamping current | IOK | -50 | | | mA | VO<0V | 5 |
| output voltage | VO | -0.5 | | 6.5 | V | active mode | 5 |
| output current | IO | | | 50 | mA | VO=0V to VCC | 5 |
| supply current | ICC | | | 100 | mA | | 5 |
| ground current | IGND | -100 | | | mA | | 5 |
| total power dissipation | Ptot | | | 500 | mW | | 5 |
| storage temperature | Tstg | -65 | | 150 | ℃ | | 5 |
| supply voltage | VCC | 1.65 | | 5.5 | V | | 5 |
| functional supply voltage | | 1.2 | | | V | | 5 |
| input voltage | VI | 0 | | 5.5 | V | | 5 |
| output voltage | VO | 0 | | | V | active mode | 5 |
| output voltage | VO | 0 | | 5.5 | V | high-impedance mode | 5 |
| ambient temperature | Tamb | -40 | | 105 | ℃ | | 5 |
| input transition rise and fall rate | Δt/ΔV | 0 | | 20 | ns/V | VCC=1.65V to 2.7V | 5 |
| input transition rise and fall rate | Δt/ΔV | 0 | | 10 | ns/V | VCC=2.7V to 3.6V | 5 |
| HIGH-level input voltage | VIH | 1.08 | | | V | VCC=1.2V | 7 |
| HIGH-level input voltage | VIH | 1.7 | | | V | VCC=2.3V to 2.7V | 7 |
| HIGH-level input voltage | VIH | 2 | | | V | VCC=2.7V to 3.6V | 7 |
| LOW-level input voltage | VIL | | | 0.12 | V | VCC=1.2V | 7 |
| LOW-level input voltage | VIL | | | 0.7 | V | VCC=2.3V to 2.7V | 7 |
| LOW-level input voltage | VIL | | | 0.8 | V | VCC=2.7V to 3.6V | 7 |
| LOW-level output voltage | VOL | | | 0.3 | V | VI=VIH or VIL; IO=100uA; VCC=1.65V to 5.5V | 7 |
| LOW-level output voltage | VOL | | | 0.6 | V | VI=VIH or VIL; IO=4mA; VCC=1.65V | 7 |
| LOW-level output voltage | VOL | | | 0.75 | V | VI=VIH or VIL; IO=8mA; VCC=2.3V | 7 |
| LOW-level output voltage | VOL | | | 0.8 | V | VI=VIH or VIL; IO=24mA; VCC=3.0V | 7 |
| input leakage current | II | -20 | | 20 | uA | VI=5.5V or GND; VCC=1.65V to 5.5V | 7 |
| OFF-state output current | IOZ | -20 | | 20 | uA | VI=VIH; VO=5.5V or GND; VCC=1.65V to 5.5V | 7 |
| power-off leakage current | IOFF | -20 | | 20 | uA | VI or VO=5.5V; VCC=0V | 7 |
| supply current | ICC | | | 40 | uA | VI=VCC or GND; IO=0A; VCC=5.5V | 7 |
| additional supply current | ΔICC | | | 5000 | uA | per input pin; VI=VCC-0.6V; IO=0A; VCC=2.7V to 5.5V | 7 |
| nA to nY OFF-state to LOW propagation delay | tPZL | 0.5 | | 6.5 | ns | see Figure 5; VCC=1.65V to 1.95V | 8 |
| nA to nY OFF-state to LOW propagation delay | tPZL | 0.5 | | 3.5 | ns | see Figure 5; VCC=2.3V to 2.7V | 8 |
| nA to nY OFF-state to LOW propagation delay | tPZL | 0.5 | | 4.5 | ns | see Figure 5; VCC=2.7V | 8 |
| nA to nY LOW to OFF-state propagation delay | tPLZ | 0.5 | | 6.5 | ns | see Figure 5; VCC=1.65V to 1.95V | 8 |
| nA to nY LOW to OFF-state propagation delay | tPLZ | 0.5 | | 3.5 | ns | see Figure 5; VCC=2.3V to 2.7V | 8 |
| nA to nY LOW to OFF-state propagation delay | tPLZ | 0.5 | | 4.5 | ns | see Figure 5; VCC=2.7V | 8 |
## CAD (KiCad official)
- Symbol: `Aip74LVC07TA14.TR`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `aip74lvc07ta14-tr-etched.step` / `aip74lvc07ta14-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aip74lvc07ta14-tr.step` / `aip74lvc07ta14-tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Wuxi I core Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590293228907106304) (14 pp, sha256 `63af2901a7a2ddd9`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/aip74lvc07ta14-tr-datasheet.pdf)