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AiP74HCT573SA20.TB

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Wuxi I-core Elec Latches, SOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicaip74hct573sa20.tbfactory-2.0.0extractor-text

Verified AiP74HCT573SA20.TB

by Ray · last 2 Nov 2026 · 1 record · files match
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Verification log 1 record

2 Nov 2026RayPublished by the parts factory: tier lcsc, 20 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AiP74HCT573SA20.TB · SOP-20 · 20 pins
  • ✓copper: 20 copper pads, none touching another net
  • ✓datasheet: all 20 pin names found in the 21-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOP-20_7.5x12.8mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-so85x8xw/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 20 pins = 20 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 20 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ aip74hct573sa20-tb.kicad_sym✓ aip74hct573sa20-tb.kicad_mod✓ aip74hct573sa20-tb.step
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Contents

README

markdown

AiP74HCT573SA20.TB

Wuxi I-core Elec · Latches · SOP-20

AiP74HCT573SA20.TB from Wuxi I-core Elec, in a SOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Three-state output enable input, active low; a high level puts the Q outputs in high impedance and does not affect the latch state.
2 D0 input Data input D0; input clamp diodes allow the input to be driven above VCC through a current-limiting resistor.
3 D1 input Data input D1; input clamp diodes allow the input to be driven above VCC through a current-limiting resistor.
4 D2 input Data input D2; input clamp diodes allow the input to be driven above VCC through a current-limiting resistor.
5 D3 input Data input D3; input clamp diodes allow the input to be driven above VCC through a current-limiting resistor.
6 D4 input Data input D4; input clamp diodes allow the input to be driven above VCC through a current-limiting resistor.
7 D5 input Data input D5; input clamp diodes allow the input to be driven above VCC through a current-limiting resistor.
8 D6 input Data input D6; input clamp diodes allow the input to be driven above VCC through a current-limiting resistor.
9 D7 input Data input D7; input clamp diodes allow the input to be driven above VCC through a current-limiting resistor.
10 GND power_in Ground (0 V) reference for the device.
11 LE input Latch enable input, active high; while high the latch is transparent and outputs follow D, and on the falling edge of LE the data present is stored.
12 Q7 tri_state Three-state latch output Q7.
13 Q6 tri_state Three-state latch output Q6.
14 Q5 tri_state Three-state latch output Q5.
15 Q4 tri_state Three-state latch output Q4.
16 Q3 tri_state Three-state latch output Q3.
17 Q2 tri_state Three-state latch output Q2.
18 Q1 tri_state Three-state latch output Q1.
19 Q0 tri_state Three-state latch output Q0.
20 VCC power_in Supply voltage; recommended range is 4.5 V to 5.5 V for the AiP74HCT573 (TTL inputs).

Key specifications

Parameter Value
Manufacturer Wuxi I-core Elec
Package SOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
电源电压 VCC -0.5 7 V 7
输入钳位电流 IIK -20 20 mA VI<-0.5V 或 VI>VCC+0.5V 7
输出钳位电流 IOK -20 20 mA VO<-0.5V 或 VO>VCC+0.5V 7
输出电流 IO -35 35 mA VO=-0.5V～(VCC+0.5V) 7
电源电流 ICC 70 mA 7
地电流 IGND -70 mA 7
贮存温度 Tstg -65 150 ℃ 7
总功耗 Ptot 500 mW 7
焊接温度 TL 250 ℃ 10秒, SOP 7
电源电压 VCC 4.5 5 5.5 V AiP74HCT573 8
输入上升和下降转换速率 Δt/ΔV 1.67 139 ns/V VCC=4.5V 8
工作环境温度 Tamb -40 105 ℃ 8
高电平输入电压 VIH 2 1.6 V VCC=4.5V～5.5V 9
低电平输入电压 VIL 1.2 0.8 V VCC=4.5V～5.5V 9
高电平输出电压 VOH 4.4 4.5 V VI=VIH或VIL；VCC=4.5V；IO=-20uA 9
高电平输出电压 VOH 3.98 4.32 V VI=VIH或VIL；VCC=4.5V；IO=-6.0mA 9
低电平输出电压 VOL 0 0.1 V VI=VIH或VIL；VCC=4.5V；IO=20uA 9
低电平输出电压 VOL 0.16 0.26 V VI=VIH或VIL；VCC=4.5V；IO=6.0mA 9
输入漏电流 II -0.1 0.1 uA VI=VCC或GND；VCC=5.5V 9
截止状态输出电流 IOZ -0.5 0.5 uA VI=VIH或VIL；VCC=5.5V；VO=VCC或GND 9
静态电流 ICC 8 uA VI=VCC或GND；IO=0A；VCC=5.5V 9
输入电容 CI 3.5 pF 9
串通电流 ΔICC 35 126 uA 每个输入引脚；Dn输入；VI=VCC-2.1V；其他输入接在VCC或GND上；VCC=4.5V～5.5V；IO=0A 9
串通电流 ΔICC 65 234 uA 每个输入引脚；LE输入；VI=VCC-2.1V；其他输入接在VCC或GND上；VCC=4.5V～5.5V；IO=0A 9
串通电流 ΔICC 125 450 uA 每个输入引脚；OE输入；VI=VCC-2.1V；其他输入接在VCC或GND上；VCC=4.5V～5.5V；IO=0A 9
高电平输入电压 VIH 2 V VCC=4.5V～5.5V 11
低电平输入电压 VIL 0.8 V VCC=4.5V～5.5V 11
高电平输出电压 VOH 4.4 V VI=VIH或VIL；VCC=4.5V；IO=-20uA 11
高电平输出电压 VOH 3.7 V VI=VIH或VIL；VCC=4.5V；IO=-6.0mA 11
低电平输出电压 VOL 0.1 V VI=VIH或VIL；VCC=4.5V；IO=20uA 11
低电平输出电压 VOL 0.4 V VI=VIH或VIL；VCC=4.5V；IO=6.0mA 11
输入漏电流 II -1 1 uA VI=VCC或GND；VCC=5.5V 11
截止状态输出电流 IOZ -10 10 uA VI=VIH或VIL；VCC=5.5V；VO=VCC或GND 11
静态电流 ICC 160 uA VI=VCC或GND；IO=0A；VCC=5.5V 11
串通电流 ΔICC 172 uA 每个输入引脚；Dn输入；VI=VCC-2.1V；其他输入接在VCC或GND上；VCC=4.5V～5.5V；IO=0A 11
串通电流 ΔICC 319 uA 每个输入引脚；LE输入；VI=VCC-2.1V；其他输入接在VCC或GND上；VCC=4.5V～5.5V；IO=0A 11
串通电流 ΔICC 613 uA 每个输入引脚；OE输入；VI=VCC-2.1V；其他输入接在VCC或GND上；VCC=4.5V～5.5V；IO=0A 11
传输延时 tpd 20 35 ns Dn到Qn；VCC=4.5V；见图6 12
传输延时 tpd 18 35 ns LE到Qn；VCC=4.5V；见图7 12
OE到Qn的使能时间 ten 17 30 ns VCC=4.5V；见图8 12
OE到Qn的失能时间 tdis 18 30 ns VCC=4.5V；见图8 12
转换时间 tt 5 12 ns Qn；VCC=4.5V；见图6 12
脉冲宽度 tW 16 5 ns LE为高电平；VCC=4.5V；见图7 12
Dn到LE的建立时间 tsu 13 7 ns Dn到LE；VCC=4.5V；见图9 12
Dn到LE的保持时间 th 9 4 ns Dn到LE；VCC=4.5V；见图9 12
传输延时 tpd 53 ns Dn到Qn；VCC=4.5V；见图6 14
OE到Qn的使能时间 ten 45 ns VCC=4.5V；见图8 14
OE到Qn的失能时间 tdis 45 ns VCC=4.5V；见图8 14
转换时间 tt 18 ns Qn；VCC=4.5V；见图6 15
脉冲宽度 tW 24 ns LE为高电平；VCC=4.5V；见图7 15
Dn到LE的建立时间 tsu 20 ns Dn到LE；VCC=4.5V；见图9 15
Dn到LE的保持时间 th 15 ns Dn到LE；VCC=4.5V；见图9 15

CAD (KiCad official)

  • Symbol: AiP74HCT573SA20.TB
  • Footprint: Package_SO:SOP-20_7.5x12.8mm_P1.27mm
  • 3D model: SOP-20 (KiCad packages3D, STEP)
  • 3D model files: aip74hct573sa20-tb-etched.step / aip74hct573sa20-tb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74hct573sa20-tb.step / aip74hct573sa20-tb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I-core Elec datasheet (21 pp, sha256 10efce6ef29c4d07, retrieved 2026-11-02, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF