component

AIP74HC74SA.TR

Public Made by Adom

by adom

Wuxi I-core Elec Flip Flops, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icsaip74hc74sa.trfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers aip74hc74sa-tr: viewers · Ray 8d ago
aip74hc74sa-tr-etched.glb Publish 0.1.0 · Ray 8d ago
aip74hc74sa-tr-etched.step aip74hc74sa-tr: factory component page (tier=lcsc) · Ray 8d ago
aip74hc74sa-tr-hero.glb aip74hc74sa-tr: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
aip74hc74sa-tr-hero.overlay.json Publish 0.1.0 · Ray 8d ago
aip74hc74sa-tr.glb Publish 0.1.0 · Ray 8d ago
aip74hc74sa-tr.kicad_mod Publish 0.1.0 · Ray 8d ago
aip74hc74sa-tr.kicad_sym Publish 0.1.0 · Ray 8d ago
aip74hc74sa-tr.lbr Publish 0.1.0 · Ray 8d ago
aip74hc74sa-tr.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

AIP74HC74SA.TR

Wuxi I-core Elec · Flip Flops · SOP-14

AIP74HC74SA.TR from Wuxi I-core Elec, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1RD input Asynchronous reset-direct input for flip-flop 1, active LOW.
2 1D input Data input of flip-flop 1, sampled on the LOW-to-HIGH clock transition.
3 1CP input Clock input of flip-flop 1, LOW-to-HIGH edge-triggered with Schmitt-trigger action.
4 1SD input Asynchronous set-direct input for flip-flop 1, active LOW.
5 1Q output True output of flip-flop 1.
6 ~{1Q} output Complement output of flip-flop 1.
7 GND power_in Ground (0V).
8 ~{2Q} output Complement output of flip-flop 2.
9 2Q output True output of flip-flop 2.
10 2SD input Asynchronous set-direct input for flip-flop 2, active LOW.
11 2CP input Clock input of flip-flop 2, LOW-to-HIGH edge-triggered with Schmitt-trigger action.
12 2D input Data input of flip-flop 2, sampled on the LOW-to-HIGH clock transition.
13 2RD input Asynchronous reset-direct input for flip-flop 2, active LOW.
14 VCC power_in Supply voltage; 2.0V to 6.0V for AiP74HC74 (recommended), absolute maximum 7V.

Key specifications

Parameter Value
Manufacturer Wuxi I-core Elec
Package SOP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 8
Input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 8
Output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 8
Output current IO -25 25 mA -0.5V < VO < VCC+0.5V 8
Supply current ICC 100 mA 8
Ground current IGND -100 mA 8
Total power dissipation Ptot 500 mW SOP14: above 70C derates linearly with 8mW/K 8
Storage temperature Tstg -65 150 ℃ 8
Soldering temperature TL 250 ℃ 10s, SOP 8
Supply voltage VCC 2 5 6 V AiP74HC74 8
Input voltage VI 0 V max printed as VCC 8
Output voltage VO 0 V max printed as VCC 8
Input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 8
Input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 8
Input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 8
Ambient temperature Tamb -40 105 ℃ 8
HIGH-level input voltage VIH 1.5 1.2 V VCC=2.0V; Tamb=-40℃ to +85℃ 9
HIGH-level input voltage VIH 3.15 2.4 V VCC=4.5V; Tamb=-40℃ to +85℃ 9
HIGH-level input voltage VIH 4.2 3.2 V VCC=6.0V; Tamb=-40℃ to +85℃ 9
LOW-level input voltage VIL 0.8 0.5 V VCC=2.0V; Tamb=-40℃ to +85℃ 9
LOW-level input voltage VIL 2.1 1.35 V VCC=4.5V; Tamb=-40℃ to +85℃ 9
LOW-level input voltage VIL 2.8 1.8 V VCC=6.0V; Tamb=-40℃ to +85℃ 9
HIGH-level output voltage VOH 3.84 4.32 V VI=VIH or VIL; IO=-4.0mA; VCC=4.5V; Tamb=-40℃ to +85℃ 9
HIGH-level output voltage VOH 5.34 5.81 V VI=VIH or VIL; IO=-5.2mA; VCC=6.0V; Tamb=-40℃ to +85℃ 9
LOW-level output voltage VOL 0.15 0.33 V VI=VIH or VIL; IO=4.0mA; VCC=4.5V; Tamb=-40℃ to +85℃ 9
LOW-level output voltage VOL 0.16 0.33 V VI=VIH or VIL; IO=5.2mA; VCC=6.0V; Tamb=-40℃ to +85℃ 9
Input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V; Tamb=-40℃ to +85℃ 9
Supply current ICC 40 uA VI=VCC or GND; IO=0A; VCC=6.0V; Tamb=-40℃ to +85℃ 9
Input capacitance CI 3.5 pF 9
HIGH-level input voltage VIH 1.5 V VCC=2.0V; Tamb=-40℃ to +105℃ 10
HIGH-level input voltage VIH 3.15 V VCC=4.5V; Tamb=-40℃ to +105℃ 10
HIGH-level input voltage VIH 4.2 V VCC=6.0V; Tamb=-40℃ to +105℃ 10
LOW-level input voltage VIL 0.5 V VCC=2.0V; Tamb=-40℃ to +105℃ 10
LOW-level input voltage VIL 1.35 V VCC=4.5V; Tamb=-40℃ to +105℃ 10
LOW-level input voltage VIL 1.8 V VCC=6.0V; Tamb=-40℃ to +105℃ 10
HIGH-level output voltage VOH 3.7 V VI=VIH or VIL; IO=-4.0mA; VCC=4.5V; Tamb=-40℃ to +105℃ 10
HIGH-level output voltage VOH 5.2 V VI=VIH or VIL; IO=-5.2mA; VCC=6.0V; Tamb=-40℃ to +105℃ 10
LOW-level output voltage VOL 0.4 V VI=VIH or VIL; IO=4.0mA; VCC=4.5V; Tamb=-40℃ to +105℃ 10
Input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V; Tamb=-40℃ to +105℃ 10
Supply current ICC 80 uA VI=VCC or GND; IO=0A; VCC=6.0V; Tamb=-40℃ to +105℃ 10
nCP to nQ,nQ̄ propagation delay tpd 17 44 ns see Figure 6; VCC=4.5V; Tamb=-40℃ to +85℃ 11
nS̄D to nQ,nQ̄ propagation delay tpd 18 50 ns see Figure 7; VCC=4.5V; Tamb=-40℃ to +85℃ 11
nR̄D to nQ,nQ̄ propagation delay tpd 19 50 ns see Figure 7; VCC=4.5V; Tamb=-40℃ to +85℃ 11
nQ,nQ̄ transition time tt 7 19 ns see Figure 6; VCC=4.5V; Tamb=-40℃ to +85℃ 11
CP pulse width tW 20 7 ns see Figure 6; VCC=4.5V; Tamb=-40℃ to +85℃ 11
nS̄D, nR̄D pulse width tW 20 7 ns see Figure 7; VCC=4.5V; Tamb=-40℃ to +85℃ 11
nS̄D, nR̄D recovery time trec 8 1 ns see Figure 7; VCC=4.5V; Tamb=-40℃ to +85℃ 11
nD to nCP set-up time tsu 15 2 ns see Figure 6; VCC=4.5V; Tamb=-40℃ to +85℃ 11
nD to nCP hold time th 3 -2 ns see Figure 6; VCC=4.5V; Tamb=-40℃ to +85℃ 11
nCP maximum frequency fmax 24 69 MHz see Figure 6; VCC=4.5V; Tamb=-40℃ to +85℃ 11
Power dissipation capacitance CPD 24 pF CL=50pF; f=1 MHz; VI=GND to VCC 11
nCP to nQ,nQ̄ propagation delay tpd 53 ns see Figure 6; VCC=4.5V; Tamb=-40℃ to +105℃ 13
nS̄D to nQ,nQ̄ propagation delay tpd 60 ns see Figure 7; VCC=4.5V; Tamb=-40℃ to +105℃ 13
nR̄D to nQ,nQ̄ propagation delay tpd 60 ns see Figure 7; VCC=4.5V; Tamb=-40℃ to +105℃ 13
nQ,nQ̄ transition time tt 22 ns see Figure 6; VCC=4.5V; Tamb=-40℃ to +105℃ 13
CP pulse width tW 24 ns see Figure 6; VCC=4.5V; Tamb=-40℃ to +105℃ 13
nS̄D, nR̄D recovery time trec 9 ns see Figure 7; VCC=4.5V; Tamb=-40℃ to +105℃ 13
nD to nCP set-up time tsu 18 ns see Figure 6; VCC=4.5V; Tamb=-40℃ to +105℃ 13
nCP maximum frequency fmax 20 MHz see Figure 6; VCC=4.5V; Tamb=-40℃ to +105℃ 13

CAD (KiCad official)

  • Symbol: AIP74HC74SA.TR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: aip74hc74sa-tr-etched.step / aip74hc74sa-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74hc74sa-tr.step / aip74hc74sa-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I-core Elec datasheet (20 pp, sha256 8a02f0e35a094107, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF