component
AIP74HC573SA20.TR
Public Made by Adomby adom
Wuxi I core Elec Signal Switches, Multiplexers, Decoders, SOP20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"manufacturer": "Wuxi I core Elec",
"package": "SOP20",
"pin_count": 20,
"category": "Logic",
"subcategory": "Signal Switches, Multiplexers, Decoders",
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"source": "Component Ocean /api/assign-pns",
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"pn": null,
"status": "quota"
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"pins": [
{
"number": "1",
"name": "OE",
"type": "input",
"description": "3-state output enable input, active LOW; a HIGH on OE forces the Q outputs to the high-impedance OFF-state and does not change the latch contents."
},
{
"number": "2",
"name": "D0",
"type": "input",
"description": "Data input to latch 0; when LE is HIGH the latch is transparent and Q0 follows D0."
},
{
"number": "3",
"name": "D1",
"type": "input",
"description": "Data input to latch 1; when LE is HIGH the latch is transparent and Q1 follows D1."
},
{
"number": "4",
"name": "D2",
"type": "input",
"description": "Data input to latch 2; when LE is HIGH the latch is transparent and Q2 follows D2."
},
{
"number": "5",
"name": "D3",
"type": "input",
"description": "Data input to latch 3; when LE is HIGH the latch is transparent and Q3 follows D3."
},
{
"number": "6",
"name": "D4",
"type": "input",
"description": "Data input to latch 4; when LE is HIGH the latch is transparent and Q4 follows D4."
},
{
"number": "7",
"name": "D5",
"type": "input",
"description": "Data input to latch 5; when LE is HIGH the latch is transparent and Q5 follows D5."
},
{
"number": "8",
"name": "D6",
"type": "input",
"description": "Data input to latch 6; when LE is HIGH the latch is transparent and Q6 follows D6."
},
{
"number": "9",
"name": "D7",
"type": "input",
"description": "Data input to latch 7; when LE is HIGH the latch is transparent and Q7 follows D7."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground (0 V) reference for all voltages on the device."
},
{
"number": "11",
"name": "LE",
"type": "input",
"description": "Latch enable input, active HIGH; the latches store the data present at the inputs on the HIGH-to-LOW transition of LE."
},
{
"number": "12",
"name": "Q7",
"type": "tri_state",
"description": "3-state non-inverting latch output 7; goes to high-impedance when OE_ is HIGH."
},
{
"number": "13",
"name": "Q6",
"type": "tri_state",
"description": "3-state non-inverting latch output 6; goes to high-impedance when OE_ is HIGH."
},
{
"number": "14",
"name": "Q5",
"type": "tri_state",
"description": "3-state non-inverting latch output 5; goes to high-impedance when OE_ is HIGH."
},
{
"number": "15",
"name": "Q4",
"type": "tri_state",
"description": "3-state non-inverting latch output 4; goes to high-impedance when OE_ is HIGH."
},
{
"number": "16",
"name": "Q3",
"type": "tri_state",
"description": "3-state non-inverting latch output 3; goes to high-impedance when OE_ is HIGH."
},
{
"number": "17",
"name": "Q2",
"type": "tri_state",
"description": "3-state non-inverting latch output 2; goes to high-impedance when OE_ is HIGH."
},
{
"number": "18",
"name": "Q1",
"type": "tri_state",
"description": "3-state non-inverting latch output 1; goes to high-impedance when OE_ is HIGH."
},
{
"number": "19",
"name": "Q0",
"type": "tri_state",
"description": "3-state non-inverting latch output 0; goes to high-impedance when OE_ is HIGH."
},
{
"number": "20",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage; 2.0 V to 6.0 V for the AiP74HC573 and 4.5 V to 5.5 V for the AiP74HCT573 per the recommended operating conditions."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin numbers come from the Pin Description table (section 2.3, page 6). The Pin Configurations drawin; The datasheet names this pin OE with an overbar (active LOW). It is written here as OE_ to indicate ; The datasheet covers the AiP74HC573 (CMOS input levels) and AiP74HCT573 (TTL input levels) in one do"
],
"pages_sent": 21,
"cost_usd": 0.0853,
"at": "2026-10-18T22:45:26"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603182016099725312",
"pages": 21,
"sha256": "26c3e753de4ac359",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
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"described": 20,
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