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AiP74HC373SA20.TR

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Wuxi I-core Elec Latches, SOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icsaip74hc373sa20.trfactory-2.0.0extractor-text

Verified AiP74HC373SA20.TR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier lcsc, 20 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AiP74HC373SA20.TR · SOP-20 · 20 pins
  • ✓copper: 20 copper pads, none touching another net
  • ✓datasheet: all 20 pin names found in the 23-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOP-20_7.5x12.8mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-9dagujlw/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.21)
  • ✓pads: 20 pins = 20 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 20 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ aip74hc373sa20-tr.kicad_sym✓ aip74hc373sa20-tr.kicad_mod✓ aip74hc373sa20-tr.step
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Symbol & Footprint

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Contents

README

markdown

AiP74HC373SA20.TR

Wuxi I-core Elec · Latches · SOP-20

AiP74HC373SA20.TR from Wuxi I-core Elec, in a SOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low three-state output enable; a high level forces Q0 to Q7 into high-impedance and does not change the latch contents.
2 Q0 tri_state Three-state latch output 0, which goes high-impedance when OE̅ is high.
3 D0 input Data input 0 to the latch, which is transparent while LE is high.
4 D1 input Data input 1 to the latch, which is transparent while LE is high.
5 Q1 tri_state Three-state latch output 1, which goes high-impedance when OE̅ is high.
6 Q2 tri_state Three-state latch output 2, which goes high-impedance when OE̅ is high.
7 D2 input Data input 2 to the latch, which is transparent while LE is high.
8 D3 input Data input 3 to the latch, which is transparent while LE is high.
9 Q3 tri_state Three-state latch output 3, which goes high-impedance when OE̅ is high.
10 GND power_in Ground reference (0 V).
11 LE input Active-high latch enable; the latch is transparent while LE is high and stores the data present before the falling edge of LE.
12 Q4 tri_state Three-state latch output 4, which goes high-impedance when OE̅ is high.
13 D4 input Data input 4 to the latch, which is transparent while LE is high.
14 D5 input Data input 5 to the latch, which is transparent while LE is high.
15 Q5 tri_state Three-state latch output 5, which goes high-impedance when OE̅ is high.
16 Q6 tri_state Three-state latch output 6, which goes high-impedance when OE̅ is high.
17 D6 input Data input 6 to the latch, which is transparent while LE is high.
18 D7 input Data input 7 to the latch, which is transparent while LE is high.
19 Q7 tri_state Three-state latch output 7, which goes high-impedance when OE̅ is high.
20 VCC power_in Power supply; the AiP74HC373 recommended range is 2.0 V to 6.0 V (typ. 5.0 V).

Key specifications

Parameter Value
Manufacturer Wuxi I-core Elec
Package SOP-20
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (HC) VCC 2 5 6 V AiP74HC373 variant 9
Input voltage VI 0 V Printed max is VCC (not numeric) 9
Output voltage VO 0 V Printed max is VCC (not numeric) 9
Input rise/fall time rate Δt/ΔV 625 ns/V VCC=2.0V 9
Input rise/fall time rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 9
Input rise/fall time rate Δt/ΔV 83 ns/V VCC=6.0V 9
Operating ambient temperature Tamb -40 125 ℃ 9
Supply voltage VCC -0.5 7 V 9
Input clamp current IIK -20 20 mA VI<-0.5V or VI>VCC+0.5V 9
Output clamp current IOK -20 20 mA VO<-0.5V or VO>VCC+0.5V 9
Output current IO -35 35 mA VO=-0.5V to (VCC+0.5V) 9
Supply current ICC 70 mA 9
Ground current IGND -70 mA 9
Storage temperature Tstg -65 150 ℃ 9
Total power dissipation Ptot 500 mW 9
Soldering temperature TL 260 ℃ 10 s, SOP/TSSOP 9
High-level input voltage VIH 1.5 1.2 V VCC=2.0V, Tamb=25℃ 10
High-level input voltage VIH 3.15 2.4 V VCC=4.5V, Tamb=25℃ 10
High-level input voltage VIH 4.2 3.2 V VCC=6.0V, Tamb=25℃ 10
Low-level input voltage VIL 0.8 0.5 V VCC=2.0V, Tamb=25℃ 10
Low-level input voltage VIL 2.1 1.35 V VCC=4.5V, Tamb=25℃ 10
Low-level input voltage VIL 2.8 1.8 V VCC=6.0V, Tamb=25℃ 10
High-level output voltage VOH 1.9 2 V VI=VIH or VIL; IO=-20uA; VCC=2.0V; Tamb=25℃ 10
High-level output voltage VOH 4.4 4.5 V VI=VIH or VIL; IO=-20uA; VCC=4.5V; Tamb=25℃ 10
High-level output voltage VOH 5.9 6 V VI=VIH or VIL; IO=-20uA; VCC=6.0V; Tamb=25℃ 10
High-level output voltage VOH 3.98 4.32 V VI=VIH or VIL; IO=-6.0mA; VCC=4.5V; Tamb=25℃ 10
High-level output voltage VOH 5.48 5.81 V VI=VIH or VIL; IO=-7.8mA; VCC=6.0V; Tamb=25℃ 10
Low-level output voltage VOL 0 0.1 V VI=VIH or VIL; IO=20uA; VCC=2.0V; Tamb=25℃ 10
Low-level output voltage VOL 0.15 0.26 V VI=VIH or VIL; IO=6.0mA; VCC=4.5V; Tamb=25℃ 10
Low-level output voltage VOL 0.16 0.26 V VI=VIH or VIL; IO=7.8mA; VCC=6.0V; Tamb=25℃ 10
Input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V; Tamb=25℃ 10
Off-state output current IOZ -1 1 uA VI=VIH or VIL; VCC=6.0V; VO=VCC or GND; Tamb=25℃ 10
Quiescent supply current ICC 8 uA VI=VCC or GND; IO=0A; VCC=6.0V; Tamb=25℃ 10
High-level input voltage VIH 1.5 V VCC=2.0V, Tamb=-40 to +125℃ 12
High-level input voltage VIH 3.15 V VCC=4.5V, Tamb=-40 to +125℃ 12
High-level input voltage VIH 4.2 V VCC=6.0V, Tamb=-40 to +125℃ 12
Low-level input voltage VIL 0.5 V VCC=2.0V, Tamb=-40 to +125℃ 12
Low-level input voltage VIL 1.35 V VCC=4.5V, Tamb=-40 to +125℃ 12
Low-level input voltage VIL 1.8 V VCC=6.0V, Tamb=-40 to +125℃ 12
High-level output voltage VOH 1.9 V VI=VIH or VIL; IO=-20uA; VCC=2.0V; Tamb=-40 to +125℃ 12
High-level output voltage VOH 4.4 V VI=VIH or VIL; IO=-20uA; VCC=4.5V; Tamb=-40 to +125℃ 12
High-level output voltage VOH 5.9 V VI=VIH or VIL; IO=-20uA; VCC=6.0V; Tamb=-40 to +125℃ 12
High-level output voltage VOH 3.7 V VI=VIH or VIL; IO=-6.0mA; VCC=4.5V; Tamb=-40 to +125℃ 12
High-level output voltage VOH 5.2 V VI=VIH or VIL; IO=-7.8mA; VCC=6.0V; Tamb=-40 to +125℃ 12
Low-level output voltage VOL 0.1 V VI=VIH or VIL; IO=20uA; VCC=2.0V; Tamb=-40 to +125℃ 12
Low-level output voltage VOL 0.4 V VI=VIH or VIL; IO=6.0mA; VCC=4.5V; Tamb=-40 to +125℃ 12
Input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V; Tamb=-40 to +125℃ 12
Off-state output current IOZ -10 10 uA VI=VIH or VIL; VCC=6.0V; VO=VCC or GND; Tamb=-40 to +125℃ 12
Quiescent supply current ICC 160 uA VI=VCC or GND; IO=0A; VCC=6.0V; Tamb=-40 to +125℃ 12
Propagation delay Dn to Qn tpd 41 150 ns VCC=2.0V; Tamb=25℃; CL=50pF; see Fig.7 13
Propagation delay Dn to Qn tpd 15 30 ns VCC=4.5V; Tamb=25℃; CL=50pF; see Fig.7 13
Propagation delay Dn to Qn tpd 12 26 ns VCC=6.0V; Tamb=25℃; CL=50pF; see Fig.7 13
Propagation delay LE to Qn tpd 50 175 ns VCC=2.0V; Tamb=25℃; CL=50pF; see Fig.8 13
Propagation delay LE to Qn tpd 18 35 ns VCC=4.5V; Tamb=25℃; CL=50pF; see Fig.8 13
Propagation delay LE to Qn tpd 14 30 ns VCC=6.0V; Tamb=25℃; CL=50pF; see Fig.8 13

CAD (KiCad official)

  • Symbol: AiP74HC373SA20.TR
  • Footprint: Package_SO:SOP-20_7.5x12.8mm_P1.27mm
  • 3D model: SOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: aip74hc373sa20-tr-etched.step / aip74hc373sa20-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74hc373sa20-tr.step / aip74hc373sa20-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I-core Elec datasheet (23 pp, sha256 678112c9d6effdf7, retrieved 2026-11-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF