component
AIP74HC32SA14.TB
Public Made by Adomby adom
Wuxi I core Elec Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAIP74HC32SA14.TB
Wuxi I core Elec · Logic Gates · SOP-14
AIP74HC32SA14.TB from Wuxi I core Elec, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input A of OR gate 1; inputs include clamp diodes and the input clamping current is limited to ±20 mA (absolute maximum). |
| 2 | 1B | input | Data input B of OR gate 1; inputs include clamp diodes and the input clamping current is limited to ±20 mA (absolute maximum). |
| 3 | 1Y | output | Data output of OR gate 1 (Y = A OR B); output current is limited to ±25 mA (absolute maximum). |
| 4 | 2A | input | Data input A of OR gate 2; inputs include clamp diodes and the input clamping current is limited to ±20 mA (absolute maximum). |
| 5 | 2B | input | Data input B of OR gate 2; inputs include clamp diodes and the input clamping current is limited to ±20 mA (absolute maximum). |
| 6 | 2Y | output | Data output of OR gate 2 (Y = A OR B); output current is limited to ±25 mA (absolute maximum). |
| 7 | GND | power_in | Ground (0 V) reference for all voltages in the device. |
| 8 | 3Y | output | Data output of OR gate 3 (Y = A OR B); output current is limited to ±25 mA (absolute maximum). |
| 9 | 3A | input | Data input A of OR gate 3; inputs include clamp diodes and the input clamping current is limited to ±20 mA (absolute maximum). |
| 10 | 3B | input | Data input B of OR gate 3; inputs include clamp diodes and the input clamping current is limited to ±20 mA (absolute maximum). |
| 11 | 4Y | output | Data output of OR gate 4 (Y = A OR B); output current is limited to ±25 mA (absolute maximum). |
| 12 | 4A | input | Data input A of OR gate 4; inputs include clamp diodes and the input clamping current is limited to ±20 mA (absolute maximum). |
| 13 | 4B | input | Data input B of OR gate 4; inputs include clamp diodes and the input clamping current is limited to ±20 mA (absolute maximum). |
| 14 | VCC | power_in | Supply voltage; for the AiP74HC32 the recommended range is 2.0 V to 6.0 V, with an absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage (absolute maximum) | VCC | -0.5 | 7 | V | 7 | ||
| input clamping current | IIK | -20 | 20 | mA | VI<-0.5V or VI>VCC+0.5V | 7 | |
| output clamping current | IOK | -20 | 20 | mA | VO<-0.5V or VO>VCC+0.5V | 7 | |
| output current | IO | -25 | 25 | mA | -0.5V<VO<VCC+0.5V | 7 | |
| supply current | ICC | 50 | mA | 7 | |||
| ground current | IGND | -50 | mA | 7 | |||
| total power dissipation | Ptot | 500 | mW | 7 | |||
| storage temperature | Tstg | -65 | 150 | ℃ | 7 | ||
| soldering temperature | TL | 250 | ℃ | 10s, SOP package | 7 | ||
| supply voltage (recommended) | VCC | 2 | 5 | 6 | V | AiP74HC32 | 7 |
| input voltage | VI | 0 | V | printed max is VCC | 7 | ||
| output voltage | VO | 0 | V | printed max is VCC | 7 | ||
| input transition rise and fall rate | Δt/ΔV | 625 | ns/V | VCC=2.0V | 7 | ||
| input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC=4.5V | 7 | |
| input transition rise and fall rate | Δt/ΔV | 83 | ns/V | VCC=6.0V | 7 | ||
| ambient temperature | Tamb | -40 | 105 | ℃ | 7 | ||
| HIGH-level input voltage (25 C) | VIH | 1.5 | 1.2 | V | VCC=2.0V | 8 | |
| HIGH-level input voltage (25 C) | VIH | 3.15 | 2.4 | V | VCC=4.5V | 8 | |
| HIGH-level input voltage (25 C) | VIH | 4.2 | 3.2 | V | VCC=6.0V | 8 | |
| LOW-level input voltage (25 C) | VIL | 0.8 | 0.5 | V | VCC=2.0V | 8 | |
| LOW-level input voltage (25 C) | VIL | 2.1 | 1.35 | V | VCC=4.5V | 8 | |
| LOW-level input voltage (25 C) | VIL | 2.8 | 1.8 | V | VCC=6.0V | 8 | |
| HIGH-level output voltage (25 C) | VOH | 1.9 | 2 | V | VI=VIH or VIL; IO=-20uA; VCC=2.0V | 8 | |
| HIGH-level output voltage (25 C) | VOH | 4.4 | 4.5 | V | VI=VIH or VIL; IO=-20uA; VCC=4.5V | 8 | |
| HIGH-level output voltage (25 C) | VOH | 5.9 | 6 | V | VI=VIH or VIL; IO=-20uA; VCC=6.0V | 8 | |
| HIGH-level output voltage (25 C) | VOH | 3.98 | 4.32 | V | VI=VIH or VIL; IO=-4.0mA; VCC=4.5V | 8 | |
| HIGH-level output voltage (25 C) | VOH | 5.48 | 5.81 | V | VI=VIH or VIL; IO=-5.2mA; VCC=6.0V | 8 | |
| LOW-level output voltage (25 C) | VOL | 0 | 0.1 | V | VI=VIH or VIL; IO=20uA; VCC=2.0V | 8 | |
| LOW-level output voltage (25 C) | VOL | 0.15 | 0.26 | V | VI=VIH or VIL; IO=4.0mA; VCC=4.5V | 8 | |
| LOW-level output voltage (25 C) | VOL | 0.16 | 0.26 | V | VI=VIH or VIL; IO=5.2mA; VCC=6.0V | 8 | |
| input leakage current (25 C) | II | -0.1 | 0.1 | uA | VI=VCC or GND; VCC=6.0V | 8 | |
| supply current (25 C) | ICC | 2 | uA | VI=VCC or GND; IO=0A; VCC=6.0V | 8 | ||
| HIGH-level input voltage (-40 to +105 C) | VIH | 1.5 | V | VCC=2.0V | 10 | ||
| HIGH-level input voltage (-40 to +105 C) | VIH | 3.15 | V | VCC=4.5V | 10 | ||
| HIGH-level input voltage (-40 to +105 C) | VIH | 4.2 | V | VCC=6.0V | 10 | ||
| LOW-level input voltage (-40 to +105 C) | VIL | 0.5 | V | VCC=2.0V | 10 | ||
| LOW-level input voltage (-40 to +105 C) | VIL | 1.35 | V | VCC=4.5V | 10 | ||
| LOW-level input voltage (-40 to +105 C) | VIL | 1.8 | V | VCC=6.0V | 10 | ||
| HIGH-level output voltage (-40 to +105 C) | VOH | 1.9 | V | VI=VIH or VIL; IO=-20uA; VCC=2.0V | 10 | ||
| HIGH-level output voltage (-40 to +105 C) | VOH | 4.4 | V | VI=VIH or VIL; IO=-20uA; VCC=4.5V | 10 | ||
| HIGH-level output voltage (-40 to +105 C) | VOH | 5.9 | V | VI=VIH or VIL; IO=-20uA; VCC=6.0V | 10 | ||
| HIGH-level output voltage (-40 to +105 C) | VOH | 3.7 | V | VI=VIH or VIL; IO=-4.0mA; VCC=4.5V | 10 | ||
| HIGH-level output voltage (-40 to +105 C) | VOH | 5.2 | V | VI=VIH or VIL; IO=-5.2mA; VCC=6.0V | 10 | ||
| LOW-level output voltage (-40 to +105 C) | VOL | 0.1 | V | VI=VIH or VIL; IO=20uA; VCC=2.0V | 10 | ||
| LOW-level output voltage (-40 to +105 C) | VOL | 0.4 | V | VI=VIH or VIL; IO=4.0mA; VCC=4.5V | 10 | ||
| input leakage current (-40 to +105 C) | II | -1 | 1 | uA | VI=VCC or GND; VCC=6.0V | 10 | |
| supply current (-40 to +105 C) | ICC | 40 | uA | VI=VCC or GND; IO=0A; VCC=6.0V | 10 | ||
| propagation delay nA, nB to nY (-40 to +105 C) | tpd | 135 | ns | see Figure 5; VCC=2.0V | 12 | ||
| propagation delay nA, nB to nY (-40 to +105 C) | tpd | 27 | ns | see Figure 5; VCC=4.5V | 12 | ||
| propagation delay nA, nB to nY (-40 to +105 C) | tpd | 23 | ns | see Figure 5; VCC=6.0V | 12 | ||
| transition time (-40 to +105 C) | tt | 110 | ns | see Figure 5; VCC=2.0V | 12 | ||
| transition time (-40 to +105 C) | tt | 22 | ns | see Figure 5; VCC=4.5V | 12 | ||
| transition time (-40 to +105 C) | tt | 19 | ns | see Figure 5; VCC=6.0V | 12 |
CAD (KiCad official)
- Symbol:
AIP74HC32SA14.TB - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
aip74hc32sa14-tb-etched.step/aip74hc32sa14-tb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);aip74hc32sa14-tb.step/aip74hc32sa14-tb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I core Elec datasheet (18 pp, sha256
618dbab46971b55b, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).