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AIP74HC244TA20.TR

Wuxi I-core Elec · Buffer/Driver/Transceiver · TSSOP-20

AIP74HC244TA20.TR from Wuxi I-core Elec, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for the 1Yn three-state outputs; a high level on this pin forces those outputs into the high-impedance state.
2 1A0 input Data input of the first 4-bit buffer; the input has a clamp diode, so it can be driven above VCC through a current-limiting resistor.
3 2Y0 tri_state Non-inverting three-state bus output of the second 4-bit buffer, high-impedance when its output enable is high.
4 1A1 input Data input of the first 4-bit buffer; the input has a clamp diode, so it can be driven above VCC through a current-limiting resistor.
5 2Y1 tri_state Non-inverting three-state bus output of the second 4-bit buffer, high-impedance when its output enable is high.
6 1A2 input Data input of the first 4-bit buffer; the input has a clamp diode, so it can be driven above VCC through a current-limiting resistor.
7 2Y2 tri_state Non-inverting three-state bus output of the second 4-bit buffer, high-impedance when its output enable is high.
8 1A3 input Data input of the first 4-bit buffer; the input has a clamp diode, so it can be driven above VCC through a current-limiting resistor.
9 2Y3 tri_state Non-inverting three-state bus output of the second 4-bit buffer, high-impedance when its output enable is high.
10 GND power_in Ground reference, 0 V.
11 2A3 input Data input of the second 4-bit buffer; the input has a clamp diode, so it can be driven above VCC through a current-limiting resistor.
12 1Y3 tri_state Non-inverting three-state bus output of the first 4-bit buffer, high-impedance when its output enable is high.
13 2A2 input Data input of the second 4-bit buffer; the input has a clamp diode, so it can be driven above VCC through a current-limiting resistor.
14 1Y2 tri_state Non-inverting three-state bus output of the first 4-bit buffer, high-impedance when its output enable is high.
15 2A1 input Data input of the second 4-bit buffer; the input has a clamp diode, so it can be driven above VCC through a current-limiting resistor.
16 1Y1 tri_state Non-inverting three-state bus output of the first 4-bit buffer, high-impedance when its output enable is high.
17 2A0 input Data input of the second 4-bit buffer; the input has a clamp diode, so it can be driven above VCC through a current-limiting resistor.
18 1Y0 tri_state Non-inverting three-state bus output of the first 4-bit buffer, high-impedance when its output enable is high.
19 2OE input Active-low output enable for the 2Yn three-state outputs; a high level on this pin forces those outputs into the high-impedance state.
20 VCC power_in Supply voltage; the AiP74HC244 is rated 2.0 V to 6.0 V and the AiP74HCT244 4.5 V to 5.5 V, with an absolute maximum of 7.0 V.

Key specifications

Parameter Value
Manufacturer Wuxi I-core Elec
Package TSSOP-20
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V Tamb=25C 6
Input clamping current IIK -20 20 mA VI<-0.5V or VI>VCC+0.5V 6
Output clamping current IOK -20 20 mA VO<-0.5V or VO>VCC+0.5V 6
Output current IO -35 35 mA -0.5V<VO<VCC+0.5V 6
Supply current ICC 70 mA 6
Ground current IGND -70 mA 6
Storage temperature Tstg -65 150 C 6
Total power dissipation Ptot 500 mW 6
Supply voltage VCC 2 5 6 V AiP74HC244 6
Input voltage VI 0 V max = VCC 6
Output voltage VO 0 V max = VCC 6
Input rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 6
Input rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 6
Input rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 6
Operating ambient temperature Tamb -40 105 C 6
High-level input voltage VIH 1.5 1.2 V Tamb=25C; VCC=2.0V 7
High-level input voltage VIH 3.15 2.4 V Tamb=25C; VCC=4.5V 7
High-level input voltage VIH 4.2 3.2 V Tamb=25C; VCC=6.0V 7
Low-level input voltage VIL 0.8 0.5 V Tamb=25C; VCC=2.0V 7
Low-level input voltage VIL 2.1 1.35 V Tamb=25C; VCC=4.5V 7
Low-level input voltage VIL 2.8 1.8 V Tamb=25C; VCC=6.0V 7
High-level output voltage VOH 1.9 2 V Tamb=25C; VI=VIH or VIL; IO=-20uA; VCC=2.0V 7
High-level output voltage VOH 4.4 4.5 V Tamb=25C; VI=VIH or VIL; IO=-20uA; VCC=4.5V 7
High-level output voltage VOH 5.9 6 V Tamb=25C; VI=VIH or VIL; IO=-20uA; VCC=6.0V 7
High-level output voltage VOH 3.98 4.32 V Tamb=25C; VI=VIH or VIL; IO=-6.0mA; VCC=4.5V 7
High-level output voltage VOH 5.48 5.81 V Tamb=25C; VI=VIH or VIL; IO=-7.8mA; VCC=6.0V 7
Low-level output voltage VOL 0 0.1 V Tamb=25C; VI=VIH or VIL; IO=20uA; VCC=2.0V 7
Low-level output voltage VOL 0.15 0.26 V Tamb=25C; VI=VIH or VIL; IO=6.0mA; VCC=4.5V 7
Low-level output voltage VOL 0.16 0.26 V Tamb=25C; VI=VIH or VIL; IO=7.8mA; VCC=6.0V 7
Input leakage current II -0.1 0.1 uA Tamb=25C; VI=VCC or GND; VCC=6.0V 7
Off-state output current IOZ -0.5 0.5 uA Tamb=25C; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND 7
Quiescent supply current ICC 8 uA Tamb=25C; VI=VCC or GND; IO=0A; VCC=6.0V 7
High-level input voltage VIH 1.5 V Tamb=-40 to +105C; VCC=2.0V 9
High-level input voltage VIH 3.15 V Tamb=-40 to +105C; VCC=4.5V 9
High-level input voltage VIH 4.2 V Tamb=-40 to +105C; VCC=6.0V 9
Low-level input voltage VIL 0.5 V Tamb=-40 to +105C; VCC=2.0V 9
Low-level input voltage VIL 1.35 V Tamb=-40 to +105C; VCC=4.5V 9
Low-level input voltage VIL 1.8 V Tamb=-40 to +105C; VCC=6.0V 9
High-level output voltage VOH 1.9 V Tamb=-40 to +105C; VI=VIH or VIL; IO=-20uA; VCC=2.0V 9
High-level output voltage VOH 4.4 V Tamb=-40 to +105C; VI=VIH or VIL; IO=-20uA; VCC=4.5V 9
High-level output voltage VOH 5.9 V Tamb=-40 to +105C; VI=VIH or VIL; IO=-20uA; VCC=6.0V 9
High-level output voltage VOH 3.7 V Tamb=-40 to +105C; VI=VIH or VIL; IO=-6.0mA; VCC=4.5V 9
High-level output voltage VOH 5.2 V Tamb=-40 to +105C; VI=VIH or VIL; IO=-7.8mA; VCC=6.0V 9
Low-level output voltage VOL 0.1 V Tamb=-40 to +105C; VI=VIH or VIL; IO=20uA; VCC=2.0V 9
Low-level output voltage VOL 0.4 V Tamb=-40 to +105C; VI=VIH or VIL; IO=6.0mA; VCC=4.5V 9
Input leakage current II -1 1 uA Tamb=-40 to +105C; VI=VCC or GND; VCC=6.0V 9
Off-state output current IOZ -10 10 uA Tamb=-40 to +105C; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND 9
Quiescent supply current ICC 160 uA Tamb=-40 to +105C; VI=VCC or GND; IO=0A; VCC=6.0V 9
Propagation delay nAn to nYn tpd 165 ns Tamb=-40 to +105C; VCC=2.0V 12
Propagation delay nAn to nYn tpd 33 ns Tamb=-40 to +105C; VCC=4.5V 12
Propagation delay nAn to nYn tpd 28 ns Tamb=-40 to +105C; VCC=6.0V 12
Enable time nOE to nYn ten 45 ns Tamb=-40 to +105C; VCC=4.5V 12
Disable time nOE to nYn tdis 45 ns Tamb=-40 to +105C; VCC=4.5V 12
Transition time tt 18 ns Tamb=-40 to +105C; VCC=4.5V 12

CAD (KiCad official)

  • Symbol: AIP74HC244TA20.TR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: aip74hc244ta20-tr-etched.step / aip74hc244ta20-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74hc244ta20-tr.step / aip74hc244ta20-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I-core Elec datasheet (18 pp, sha256 8a752d8af77d4618, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF