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AiP74HC244SA20.TR

Wuxi I core Elec · Buffers, Drivers, Receivers, Transceivers · SOP-20

AiP74HC244SA20.TR from Wuxi I core Elec, in a SOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable for outputs 1Y0 to 1Y3, active low; a high level forces those outputs into the high-impedance (Z) state.
2 1A0 input Data input for channel 1A0, non-inverting to 1Y0; input clamp diodes allow voltages above VCC through a current-limiting resistor, with input clamp current limited to ±20 mA.
3 2Y0 tri_state Three-state bus output, non-inverting from 2A0; output current is limited to ±35 mA.
4 1A1 input Data input for channel 1A1, non-inverting to 1Y1; input clamp diodes allow voltages above VCC through a current-limiting resistor.
5 2Y1 tri_state Three-state bus output, non-inverting from 2A1; output current is limited to ±35 mA.
6 1A2 input Data input for channel 1A2, non-inverting to 1Y2; input clamp diodes allow voltages above VCC through a current-limiting resistor.
7 2Y2 tri_state Three-state bus output, non-inverting from 2A2; output current is limited to ±35 mA.
8 1A3 input Data input for channel 1A3, non-inverting to 1Y3; input clamp diodes allow voltages above VCC through a current-limiting resistor.
9 2Y3 tri_state Three-state bus output, non-inverting from 2A3; output current is limited to ±35 mA.
10 GND power_in Ground (0 V) reference.
11 2A3 input Data input for channel 2A3, non-inverting to 2Y3; input clamp diodes allow voltages above VCC through a current-limiting resistor.
12 1Y3 tri_state Three-state bus output, non-inverting from 1A3; output current is limited to ±35 mA.
13 2A2 input Data input for channel 2A2, non-inverting to 2Y2; input clamp diodes allow voltages above VCC through a current-limiting resistor.
14 1Y2 tri_state Three-state bus output, non-inverting from 1A2; output current is limited to ±35 mA.
15 2A1 input Data input for channel 2A1, non-inverting to 2Y1; input clamp diodes allow voltages above VCC through a current-limiting resistor.
16 1Y1 tri_state Three-state bus output, non-inverting from 1A1; output current is limited to ±35 mA.
17 2A0 input Data input for channel 2A0, non-inverting to 2Y0; input clamp diodes allow voltages above VCC through a current-limiting resistor.
18 1Y0 tri_state Three-state bus output, non-inverting from 1A0; output current is limited to ±35 mA.
19 2OE input Output enable for outputs 2Y0 to 2Y3, active low; a high level forces those outputs into the high-impedance (Z) state.
20 VCC power_in Supply voltage: 2.0 V to 6.0 V for AiP74HC244 and 4.5 V to 5.5 V for AiP74HCT244; absolute maximum 7.0 V.

Key specifications

Parameter Value
Manufacturer Wuxi I core Elec
Package SOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 6
Input clamp current IIK -20 20 mA VI<-0.5V 或 VI>VCC+0.5V 6
Output clamp current IOK -20 20 mA VO<-0.5V 或 VO>VCC+0.5V 6
Output current IO -35 35 mA -0.5V<VO<VCC+0.5V 6
Supply current ICC 70 mA 6
Ground current IGND -70 mA 6
Storage temperature Tstg -65 150 ℃ 6
Total power dissipation Ptot 500 mW 6
Soldering temperature (SOP) TL 250 ℃ 10 s 6
Supply voltage VCC 2 5 6 V 6
Input voltage VI 0 V 6
Output voltage VO 0 V 6
Input rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 6
Input rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 6
Input rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 6
Operating ambient temperature Tamb -40 105 ℃ 6
High-level input voltage VIH 1.5 1.2 V Tamb=25℃; VCC=2.0V 7
High-level input voltage VIH 3.15 2.4 V Tamb=25℃; VCC=4.5V 7
High-level input voltage VIH 4.2 3.2 V Tamb=25℃; VCC=6.0V 7
Low-level input voltage VIL 0.8 0.5 V Tamb=25℃; VCC=2.0V 7
Low-level input voltage VIL 2.1 1.35 V Tamb=25℃; VCC=4.5V 7
Low-level input voltage VIL 2.8 1.8 V Tamb=25℃; VCC=6.0V 7
High-level output voltage VOH 1.9 2 V Tamb=25℃; VI=VIH或VIL; IO=-20uA; VCC=2.0V 7
High-level output voltage VOH 4.4 4.5 V Tamb=25℃; VI=VIH或VIL; IO=-20uA; VCC=4.5V 7
High-level output voltage VOH 5.9 6 V Tamb=25℃; VI=VIH或VIL; IO=-20uA; VCC=6.0V 7
High-level output voltage VOH 3.98 4.32 V Tamb=25℃; VI=VIH或VIL; IO=-6.0mA; VCC=4.5V 7
High-level output voltage VOH 5.48 5.81 V Tamb=25℃; VI=VIH或VIL; IO=-7.8mA; VCC=6.0V 7
Low-level output voltage VOL 0 0.1 V Tamb=25℃; VI=VIH或VIL; IO=20uA; VCC=2.0V 7
Low-level output voltage VOL 0.15 0.26 V Tamb=25℃; VI=VIH或VIL; IO=6.0mA; VCC=4.5V 7
Low-level output voltage VOL 0.16 0.26 V Tamb=25℃; VI=VIH或VIL; IO=7.8mA; VCC=6.0V 7
Input leakage current II -0.1 0.1 uA Tamb=25℃; VI=VCC或GND; VCC=6.0V 7
Off-state output current IOZ -0.5 0.5 uA Tamb=25℃; VI=VIH或VIL; VCC=6.0V; VO=VCC或GND 7
Quiescent supply current ICC 8 uA Tamb=25℃; VI=VCC或GND; IO=0A; VCC=6.0V 7
High-level input voltage VIH 1.5 V Tamb=-40℃~+105℃; VCC=2.0V 9
High-level input voltage VIH 3.15 V Tamb=-40℃~+105℃; VCC=4.5V 9
High-level input voltage VIH 4.2 V Tamb=-40℃~+105℃; VCC=6.0V 9
Low-level input voltage VIL 0.5 V Tamb=-40℃~+105℃; VCC=2.0V 9
Low-level input voltage VIL 1.35 V Tamb=-40℃~+105℃; VCC=4.5V 9
Low-level input voltage VIL 1.8 V Tamb=-40℃~+105℃; VCC=6.0V 9
High-level output voltage VOH 1.9 V Tamb=-40℃~+105℃; VI=VIH或VIL; IO=-20uA; VCC=2.0V 9
High-level output voltage VOH 4.4 V Tamb=-40℃~+105℃; VI=VIH或VIL; IO=-20uA; VCC=4.5V 9
High-level output voltage VOH 5.9 V Tamb=-40℃~+105℃; VI=VIH或VIL; IO=-20uA; VCC=6.0V 9
High-level output voltage VOH 3.7 V Tamb=-40℃~+105℃; VI=VIH或VIL; IO=-6.0mA; VCC=4.5V 9
High-level output voltage VOH 5.2 V Tamb=-40℃~+105℃; VI=VIH或VIL; IO=-7.8mA; VCC=6.0V 9
Low-level output voltage VOL 0.1 V Tamb=-40℃~+105℃; VI=VIH或VIL; IO=20uA; VCC=2.0V 9
Low-level output voltage VOL 0.4 V Tamb=-40℃~+105℃; VI=VIH或VIL; IO=6.0mA; VCC=4.5V 9
Input leakage current II -1 1 uA Tamb=-40℃~+105℃; VI=VCC或GND; VCC=6.0V 9
Off-state output current IOZ -10 10 uA Tamb=-40℃~+105℃; VI=VIH或VIL; VCC=6.0V; VO=VCC或GND 9
Quiescent supply current ICC 160 uA Tamb=-40℃~+105℃; VI=VCC或GND; IO=0A; VCC=6.0V 9
Propagation delay nAn to nYn tpd 30 110 ns Tamb=25℃; 见图5; VCC=2.0V 10
Propagation delay nAn to nYn tpd 11 22 ns Tamb=25℃; 见图5; VCC=4.5V 10
Propagation delay nAn to nYn tpd 9 19 ns Tamb=25℃; 见图5; VCC=6.0V 10
Enable time nOE to nYn ten 13 30 ns Tamb=25℃; 见图6; VCC=4.5V 10
Disable time nOE to nYn tdis 14 30 ns Tamb=25℃; 见图6; VCC=4.5V 10
Input capacitance CI 3.5 pF Tamb=25℃ 7

CAD (KiCad official)

  • Symbol: AiP74HC244SA20.TR
  • Footprint: Package_SO:SOP-20_7.5x12.8mm_P1.27mm
  • 3D model: SOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: aip74hc244sa20-tr-etched.step / aip74hc244sa20-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74hc244sa20-tr.step / aip74hc244sa20-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I core Elec datasheet (18 pp, sha256 626642db880a4a50, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF