component
AIP74HC244SA.TB
Public Made by Adomby adom
Wuxi I-core Elec Buffer/Driver/Transceiver, SOP-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
AIP74HC244SA.TB
Wuxi I-core Elec · Buffer/Driver/Transceiver · SOP-20-300mil
AIP74HC244SA.TB from Wuxi I-core Elec, in a SOP-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for the 1Y outputs, active LOW; a HIGH puts them in high-impedance OFF-state. |
| 2 | 1A0 | input | Data input 0 of bank 1. |
| 3 | 2Y0 | tri_state | Bus output 0 of bank 2 (3-state, non-inverting). |
| 4 | 1A1 | input | Data input 1 of bank 1. |
| 5 | 2Y1 | tri_state | Bus output 1 of bank 2 (3-state, non-inverting). |
| 6 | 1A2 | input | Data input 2 of bank 1. |
| 7 | 2Y2 | tri_state | Bus output 2 of bank 2 (3-state, non-inverting). |
| 8 | 1A3 | input | Data input 3 of bank 1. |
| 9 | 2Y3 | tri_state | Bus output 3 of bank 2 (3-state, non-inverting). |
| 10 | GND | power_in | Ground (0 V). |
| 11 | 2A3 | input | Data input 3 of bank 2. |
| 12 | 1Y3 | tri_state | Bus output 3 of bank 1 (3-state, non-inverting). |
| 13 | 2A2 | input | Data input 2 of bank 2. |
| 14 | 1Y2 | tri_state | Bus output 2 of bank 1 (3-state, non-inverting). |
| 15 | 2A1 | input | Data input 1 of bank 2. |
| 16 | 1Y1 | tri_state | Bus output 1 of bank 1 (3-state, non-inverting). |
| 17 | 2A0 | input | Data input 0 of bank 2. |
| 18 | 1Y0 | tri_state | Bus output 0 of bank 1 (3-state, non-inverting). |
| 19 | 2OE | input | Output enable input for the 2Y outputs, active LOW; a HIGH puts them in high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage, 2.0 V to 6.0 V for AiP74HC244 (absolute maximum 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I-core Elec |
| Package | SOP-20-300mil |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 6 | ||
| Input clamping current | IIK | 20 | mA | VI < -0.5V or VI > VCC+0.5V; printed ±20 | 6 | ||
| Output clamping current | IOK | 20 | mA | VO < -0.5V or VO > VCC+0.5V; printed ±20 | 6 | ||
| Output current | IO | 35 | mA | -0.5V < VO < VCC+0.5V; printed ±35 | 6 | ||
| Supply current | ICC | 70 | mA | 6 | |||
| Ground current | IGND | -70 | mA | 6 | |||
| Storage temperature | Tstg | -65 | 150 | ℃ | 6 | ||
| Total power dissipation | Ptot | 500 | mW | SOP20: above 70℃ derates linearly with 8mW/K | 6 | ||
| Soldering temperature | TL | 250 | ℃ | 10s, SOP | 6 | ||
| Supply voltage | VCC | 2 | 5 | 6 | V | AiP74HC244 | 6 |
| Input transition rise and fall rate | Δt/ΔV | 625 | ns/V | VCC=2.0V | 6 | ||
| Input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC=4.5V | 6 | |
| Input transition rise and fall rate | Δt/ΔV | 83 | ns/V | VCC=6.0V | 6 | ||
| Ambient temperature | Tamb | -40 | 85 | ℃ | 6 | ||
| HIGH-level input voltage | VIH | 1.5 | 1.2 | V | Tamb=25℃; VCC=2.0V | 7 | |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | V | Tamb=25℃; VCC=4.5V | 7 | |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | V | Tamb=25℃; VCC=6.0V | 7 | |
| LOW-level input voltage | VIL | 0.8 | 0.5 | V | Tamb=25℃; VCC=2.0V | 7 | |
| LOW-level input voltage | VIL | 2.1 | 1.35 | V | Tamb=25℃; VCC=4.5V | 7 | |
| LOW-level input voltage | VIL | 2.8 | 1.8 | V | Tamb=25℃; VCC=6.0V | 7 | |
| HIGH-level output voltage | VOH | 1.9 | 2 | V | Tamb=25℃; VI = VIH or VIL; IO=-20uA; VCC=2.0V | 7 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | Tamb=25℃; VI = VIH or VIL; IO=-20uA; VCC=4.5V | 7 | |
| HIGH-level output voltage | VOH | 5.9 | 6 | V | Tamb=25℃; VI = VIH or VIL; IO=-20uA; VCC=6.0V | 7 | |
| HIGH-level output voltage | VOH | 3.98 | 4.32 | V | Tamb=25℃; VI = VIH or VIL; IO=-6.0mA; VCC=4.5V | 7 | |
| HIGH-level output voltage | VOH | 5.48 | 5.81 | V | Tamb=25℃; VI = VIH or VIL; IO=-7.8mA; VCC=6.0V | 7 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | Tamb=25℃; VI = VIH or VIL; IO=20uA; VCC=2.0V | 7 | |
| LOW-level output voltage | VOL | 0.15 | 0.26 | V | Tamb=25℃; VI = VIH or VIL; IO=6.0mA; VCC=4.5V | 7 | |
| LOW-level output voltage | VOL | 0.16 | 0.26 | V | Tamb=25℃; VI = VIH or VIL; IO=7.8mA; VCC=6.0V | 7 | |
| Input leakage current | II | -0.1 | 0.1 | uA | Tamb=25℃; VI=VCC or GND; VCC=6.0V; printed ±0.1 | 7 | |
| OFF-state output current | IOZ | -0.5 | 0.5 | uA | Tamb=25℃; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND; printed ±0.5 | 7 | |
| Supply current | ICC | 8 | uA | Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V | 7 | ||
| HIGH-level input voltage | VIH | 3.15 | V | Tamb=-40℃ to +85℃; VCC=4.5V | 8 | ||
| LOW-level input voltage | VIL | 1.35 | V | Tamb=-40℃ to +85℃; VCC=4.5V | 8 | ||
| HIGH-level output voltage | VOH | 1.9 | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-20uA; VCC=2.0V | 8 | ||
| HIGH-level output voltage | VOH | 4.4 | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-20uA; VCC=4.5V | 8 | ||
| HIGH-level output voltage | VOH | 3.84 | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-6.0mA; VCC=4.5V | 8 | ||
| HIGH-level output voltage | VOH | 5.34 | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-7.8mA; VCC=6.0V | 8 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=20uA; VCC=4.5V | 8 | ||
| LOW-level output voltage | VOL | 0.33 | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=6.0mA; VCC=4.5V | 8 | ||
| Input leakage current | II | -1 | 1 | uA | Tamb=-40℃ to +85℃; VI=VCC or GND; VCC=6.0V; printed ±1.0 | 8 | |
| OFF-state output current | IOZ | -5 | 5 | uA | Tamb=-40℃ to +85℃; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND; printed ±5.0 | 8 | |
| Supply current | ICC | 80 | uA | Tamb=-40℃ to +85℃; VI=VCC or GND; IO=0A; VCC=6.0V | 8 | ||
| Propagation delay nAn to nYn | tpd | 11 | 22 | ns | Tamb=25℃; VCC=4.5V; see Figure 5 | 9 | |
| Enable time nOE to nYn | ten | 13 | 30 | ns | Tamb=25℃; VCC=4.5V; see Figure 6 | 9 | |
| Disable time nOE to nYn | tdis | 14 | 30 | ns | Tamb=25℃; VCC=4.5V; see Figure 6 | 9 | |
| Transition time | tt | 5 | 12 | ns | Tamb=25℃; VCC=4.5V; see Figure 5 | 9 | |
| Propagation delay nAn to nYn | tpd | 28 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 5 | 10 | ||
| Enable time nOE to nYn | ten | 38 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 6 | 10 | ||
| Disable time nOE to nYn | tdis | 38 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 6 | 10 | ||
| Transition time | tt | 15 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 5 | 10 | ||
| Input capacitance | CI | 3.5 | pF | Tamb=25℃ | 7 | ||
| Power dissipation capacitance | CPD | 35 | pF | Tamb=25℃; per buffer; VI=GND to VCC | 9 |
CAD (KiCad official)
- Symbol:
AIP74HC244SA.TB - Footprint:
Package_SO:SOP-20_7.5x12.8mm_P1.27mm - 3D model: SOP-20-300mil, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
aip74hc244sa-tb-etched.step/aip74hc244sa-tb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);aip74hc244sa-tb.step/aip74hc244sa-tb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I-core Elec datasheet (16 pp, sha256
06f00ce8e30be55b, retrieved 2026-10-30, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AIP74HC244SA.TB
**Wuxi I-core Elec** · Buffer/Driver/Transceiver · SOP-20-300mil
AIP74HC244SA.TB from Wuxi I-core Elec, in a SOP-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for the 1Y outputs, active LOW; a HIGH puts them in high-impedance OFF-state. |
| 2 | 1A0 | input | Data input 0 of bank 1. |
| 3 | 2Y0 | tri_state | Bus output 0 of bank 2 (3-state, non-inverting). |
| 4 | 1A1 | input | Data input 1 of bank 1. |
| 5 | 2Y1 | tri_state | Bus output 1 of bank 2 (3-state, non-inverting). |
| 6 | 1A2 | input | Data input 2 of bank 1. |
| 7 | 2Y2 | tri_state | Bus output 2 of bank 2 (3-state, non-inverting). |
| 8 | 1A3 | input | Data input 3 of bank 1. |
| 9 | 2Y3 | tri_state | Bus output 3 of bank 2 (3-state, non-inverting). |
| 10 | GND | power_in | Ground (0 V). |
| 11 | 2A3 | input | Data input 3 of bank 2. |
| 12 | 1Y3 | tri_state | Bus output 3 of bank 1 (3-state, non-inverting). |
| 13 | 2A2 | input | Data input 2 of bank 2. |
| 14 | 1Y2 | tri_state | Bus output 2 of bank 1 (3-state, non-inverting). |
| 15 | 2A1 | input | Data input 1 of bank 2. |
| 16 | 1Y1 | tri_state | Bus output 1 of bank 1 (3-state, non-inverting). |
| 17 | 2A0 | input | Data input 0 of bank 2. |
| 18 | 1Y0 | tri_state | Bus output 0 of bank 1 (3-state, non-inverting). |
| 19 | 2OE | input | Output enable input for the 2Y outputs, active LOW; a HIGH puts them in high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage, 2.0 V to 6.0 V for AiP74HC244 (absolute maximum 7.0 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I-core Elec |
| Package | SOP-20-300mil |
| Category | Logic ICs |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | | 7 | V | | 6 |
| Input clamping current | IIK | | | 20 | mA | VI < -0.5V or VI > VCC+0.5V; printed ±20 | 6 |
| Output clamping current | IOK | | | 20 | mA | VO < -0.5V or VO > VCC+0.5V; printed ±20 | 6 |
| Output current | IO | | | 35 | mA | -0.5V < VO < VCC+0.5V; printed ±35 | 6 |
| Supply current | ICC | | | 70 | mA | | 6 |
| Ground current | IGND | -70 | | | mA | | 6 |
| Storage temperature | Tstg | -65 | | 150 | ℃ | | 6 |
| Total power dissipation | Ptot | | | 500 | mW | SOP20: above 70℃ derates linearly with 8mW/K | 6 |
| Soldering temperature | TL | | | 250 | ℃ | 10s, SOP | 6 |
| Supply voltage | VCC | 2 | 5 | 6 | V | AiP74HC244 | 6 |
| Input transition rise and fall rate | Δt/ΔV | | | 625 | ns/V | VCC=2.0V | 6 |
| Input transition rise and fall rate | Δt/ΔV | | 1.67 | 139 | ns/V | VCC=4.5V | 6 |
| Input transition rise and fall rate | Δt/ΔV | | | 83 | ns/V | VCC=6.0V | 6 |
| Ambient temperature | Tamb | -40 | | 85 | ℃ | | 6 |
| HIGH-level input voltage | VIH | 1.5 | 1.2 | | V | Tamb=25℃; VCC=2.0V | 7 |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | | V | Tamb=25℃; VCC=4.5V | 7 |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | | V | Tamb=25℃; VCC=6.0V | 7 |
| LOW-level input voltage | VIL | | 0.8 | 0.5 | V | Tamb=25℃; VCC=2.0V | 7 |
| LOW-level input voltage | VIL | | 2.1 | 1.35 | V | Tamb=25℃; VCC=4.5V | 7 |
| LOW-level input voltage | VIL | | 2.8 | 1.8 | V | Tamb=25℃; VCC=6.0V | 7 |
| HIGH-level output voltage | VOH | 1.9 | 2 | | V | Tamb=25℃; VI = VIH or VIL; IO=-20uA; VCC=2.0V | 7 |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | | V | Tamb=25℃; VI = VIH or VIL; IO=-20uA; VCC=4.5V | 7 |
| HIGH-level output voltage | VOH | 5.9 | 6 | | V | Tamb=25℃; VI = VIH or VIL; IO=-20uA; VCC=6.0V | 7 |
| HIGH-level output voltage | VOH | 3.98 | 4.32 | | V | Tamb=25℃; VI = VIH or VIL; IO=-6.0mA; VCC=4.5V | 7 |
| HIGH-level output voltage | VOH | 5.48 | 5.81 | | V | Tamb=25℃; VI = VIH or VIL; IO=-7.8mA; VCC=6.0V | 7 |
| LOW-level output voltage | VOL | | 0 | 0.1 | V | Tamb=25℃; VI = VIH or VIL; IO=20uA; VCC=2.0V | 7 |
| LOW-level output voltage | VOL | | 0.15 | 0.26 | V | Tamb=25℃; VI = VIH or VIL; IO=6.0mA; VCC=4.5V | 7 |
| LOW-level output voltage | VOL | | 0.16 | 0.26 | V | Tamb=25℃; VI = VIH or VIL; IO=7.8mA; VCC=6.0V | 7 |
| Input leakage current | II | -0.1 | | 0.1 | uA | Tamb=25℃; VI=VCC or GND; VCC=6.0V; printed ±0.1 | 7 |
| OFF-state output current | IOZ | -0.5 | | 0.5 | uA | Tamb=25℃; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND; printed ±0.5 | 7 |
| Supply current | ICC | | | 8 | uA | Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V | 7 |
| HIGH-level input voltage | VIH | 3.15 | | | V | Tamb=-40℃ to +85℃; VCC=4.5V | 8 |
| LOW-level input voltage | VIL | | | 1.35 | V | Tamb=-40℃ to +85℃; VCC=4.5V | 8 |
| HIGH-level output voltage | VOH | 1.9 | | | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-20uA; VCC=2.0V | 8 |
| HIGH-level output voltage | VOH | 4.4 | | | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-20uA; VCC=4.5V | 8 |
| HIGH-level output voltage | VOH | 3.84 | | | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-6.0mA; VCC=4.5V | 8 |
| HIGH-level output voltage | VOH | 5.34 | | | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-7.8mA; VCC=6.0V | 8 |
| LOW-level output voltage | VOL | | | 0.1 | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=20uA; VCC=4.5V | 8 |
| LOW-level output voltage | VOL | | | 0.33 | V | Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=6.0mA; VCC=4.5V | 8 |
| Input leakage current | II | -1 | | 1 | uA | Tamb=-40℃ to +85℃; VI=VCC or GND; VCC=6.0V; printed ±1.0 | 8 |
| OFF-state output current | IOZ | -5 | | 5 | uA | Tamb=-40℃ to +85℃; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND; printed ±5.0 | 8 |
| Supply current | ICC | | | 80 | uA | Tamb=-40℃ to +85℃; VI=VCC or GND; IO=0A; VCC=6.0V | 8 |
| Propagation delay nAn to nYn | tpd | | 11 | 22 | ns | Tamb=25℃; VCC=4.5V; see Figure 5 | 9 |
| Enable time nOE to nYn | ten | | 13 | 30 | ns | Tamb=25℃; VCC=4.5V; see Figure 6 | 9 |
| Disable time nOE to nYn | tdis | | 14 | 30 | ns | Tamb=25℃; VCC=4.5V; see Figure 6 | 9 |
| Transition time | tt | | 5 | 12 | ns | Tamb=25℃; VCC=4.5V; see Figure 5 | 9 |
| Propagation delay nAn to nYn | tpd | | | 28 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 5 | 10 |
| Enable time nOE to nYn | ten | | | 38 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 6 | 10 |
| Disable time nOE to nYn | tdis | | | 38 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 6 | 10 |
| Transition time | tt | | | 15 | ns | Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 5 | 10 |
| Input capacitance | CI | | 3.5 | | pF | Tamb=25℃ | 7 |
| Power dissipation capacitance | CPD | | 35 | | pF | Tamb=25℃; per buffer; VI=GND to VCC | 9 |
## CAD (KiCad official)
- Symbol: `AIP74HC244SA.TB`
- Footprint: `Package_SO:SOP-20_7.5x12.8mm_P1.27mm`
- 3D model: SOP-20-300mil, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `aip74hc244sa-tb-etched.step` / `aip74hc244sa-tb-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aip74hc244sa-tb.step` / `aip74hc244sa-tb.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Wuxi I-core Elec datasheet](docs/aip74hc244sa-tb-datasheet.pdf) (16 pp, sha256 `06f00ce8e30be55b`, retrieved 2026-10-30, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/aip74hc244sa-tb-datasheet.pdf)