component

AiP74HC165SA16.TR

Public Made by Adom

by adom

Wuxi I core Elec Shifting Register, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentlogicaip74hc165sa16.tr
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

AiP74HC165SA16.TR

Wuxi I core Elec · Shifting Register · SOP-16

AiP74HC165SA16.TR from Wuxi I core Elec, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PL input Asynchronous parallel load input, active low. When PL=L, data on D0-D7 is loaded into the shift register regardless of CP.
2 CP input Clock input, low-to-high edge triggered. Shifts serial data through the register when CE is low and PL is high.
3 D4 input Parallel data input bit 4 (Dn). Loaded into the corresponding shift-register stage when PL is low.
4 D5 input Parallel data input bit 5 (Dn). Loaded into the corresponding shift-register stage when PL is low.
5 D6 input Parallel data input bit 6 (Dn). Loaded into the corresponding shift-register stage when PL is low.
6 D7 input Parallel data input bit 7 (Dn). Last stage that appears at Q7 after a parallel load.
7 /Q7 output Complementary serial output of the last (Q7) stage. Inverse of the Q7 pin.
8 GND power_in Ground reference (0 V).
9 Q7 output Serial output from the last (Q7) stage of the shift register.
10 DS input Serial data input. Shifted into stage Q0 on each CP rising edge while CE is low and PL is high.
11 D0 input Parallel data input bit 0 (Dn). Loaded into the corresponding shift-register stage when PL is low.
12 D1 input Parallel data input bit 1 (Dn). Loaded into the corresponding shift-register stage when PL is low.
13 D2 input Parallel data input bit 2 (Dn). Loaded into the corresponding shift-register stage when PL is low.
14 D3 input Parallel data input bit 3 (Dn). Loaded into the corresponding shift-register stage when PL is low.
15 CE input Clock enable input, active low. When CE is low the clock is enabled; a high on CE inhibits (gates off) the CP input.
16 VCC power_in Supply voltage. AiP74HC165: 2.0-6.0 V (5.0 V typ). AiP74HCT165: 4.5-5.5 V (5.0 V typ). Absolute max +7 V.

Key specifications

Parameter Value
Manufacturer Wuxi I core Elec
Package SOP-16
Category Logic
Pins 16

Ordering variants

  • AiP74HC165SA16.TR
  • AiP74HC165SA16.TRSA16.TB
  • AiP74HC165SA16.TRDA16.TB
  • AiP74HC165SA16.TRTA16.TB
  • AiP74HC165SA16.TRTA16.TR

CAD (KiCad official)

  • Symbol: AiP74HC165SA16.TR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: aip74hc165sa16-tr-etched.step / aip74hc165sa16-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74hc165sa16-tr.step / aip74hc165sa16-tr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
aip74hc165sa16-tr.step 217 KB You want the bare part, or you mark your own boards.
aip74hc165sa16-tr-etched.step 3.2 MB You want the part with AiP74HC165SA16.TR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 816 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I core Elec datasheet (25 pp, sha256 0c8af9520508e3e0, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF