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Aip74HC125SA14.TR

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Wuxi I core Elec Buffers, Drivers, Receivers, Transceivers, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Aip74HC125SA14.TR

Wuxi I core Elec · Buffers, Drivers, Receivers, Transceivers · SOP-14

Aip74HC125SA14.TR from Wuxi I core Elec, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable input for buffer 1, active LOW; a HIGH level forces output 1Y into the high-impedance OFF-state.
2 1A input Data input of buffer 1; inputs include clamp diodes, the input voltage must stay between 0 V and VCC, and the input clamping current is limited to ±20 mA.
3 1Y tri_state Data output of buffer 1; output current is limited to ±35 mA and the output goes high-impedance when 1OE is HIGH.
4 2OE input Output enable input for buffer 2, active LOW; a HIGH level forces output 2Y into the high-impedance OFF-state.
5 2A input Data input of buffer 2; inputs include clamp diodes, the input voltage must stay between 0 V and VCC, and the input clamping current is limited to ±20 mA.
6 2Y tri_state Data output of buffer 2; output current is limited to ±35 mA and the output goes high-impedance when 2OE is HIGH.
7 GND power_in Ground reference (0 V) for the device.
8 3Y tri_state Data output of buffer 3; output current is limited to ±35 mA and the output goes high-impedance when 3OE is HIGH.
9 3A input Data input of buffer 3; inputs include clamp diodes, the input voltage must stay between 0 V and VCC, and the input clamping current is limited to ±20 mA.
10 3OE input Output enable input for buffer 3, active LOW; a HIGH level forces output 3Y into the high-impedance OFF-state.
11 4Y tri_state Data output of buffer 4; output current is limited to ±35 mA and the output goes high-impedance when 4OE is HIGH.
12 4A input Data input of buffer 4; inputs include clamp diodes, the input voltage must stay between 0 V and VCC, and the input clamping current is limited to ±20 mA.
13 4OE input Output enable input for buffer 4, active LOW; a HIGH level forces output 4Y into the high-impedance OFF-state.
14 VCC power_in Supply voltage; absolute maximum is 7 V, recommended 2.0 V to 6.0 V for AiP74HC125 and 4.5 V to 5.5 V for AiP74HCT125.

Key specifications

Parameter Value
Manufacturer Wuxi I core Elec
Package SOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V 7
input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 7
output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 7
output current IO -35 35 mA -0.5V < VO < VCC+0.5V 7
supply current ICC 70 mA 7
ground current IGND -70 mA 7
total power dissipation Ptot 500 mW 7
storage temperature Tstg -65 150 ℃ 7
soldering temperature TL 250 ℃ 10s; SOP package 7
supply voltage VCC 2 5 6 V 7
input voltage VI 0 V 7
output voltage VO 0 V 7
input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 7
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 7
input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 7
ambient temperature Tamb -40 85 ℃ 7
HIGH-level input voltage VIH 1.5 V Tamb=-40℃ to +85℃; VCC=2.0V 9
HIGH-level input voltage VIH 3.15 V Tamb=-40℃ to +85℃; VCC=4.5V 9
HIGH-level input voltage VIH 4.2 V Tamb=-40℃ to +85℃; VCC=6.0V 9
LOW-level input voltage VIL 0.5 V Tamb=-40℃ to +85℃; VCC=2.0V 9
LOW-level input voltage VIL 1.35 V Tamb=-40℃ to +85℃; VCC=4.5V 9
LOW-level input voltage VIL 1.8 V Tamb=-40℃ to +85℃; VCC=6.0V 9
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-20uA; VCC=2.0V 9
HIGH-level output voltage VOH 4.4 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-20uA; VCC=4.5V 9
HIGH-level output voltage VOH 5.9 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-20uA; VCC=6.0V 9
HIGH-level output voltage VOH 3.84 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-6.0mA; VCC=4.5V 9
HIGH-level output voltage VOH 5.34 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=-7.8mA; VCC=6.0V 9
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=20uA; VCC=2.0V 9
LOW-level output voltage VOL 0.33 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=6.0mA; VCC=4.5V 9
input leakage current II -1 1 uA Tamb=-40℃ to +85℃; VI= VCC or GND; VCC=6.0V 9
OFF-state output current IOZ -5 5 uA Tamb=-40℃ to +85℃; VI = VIH or VIL; VO= VCC or GND; VCC=6.0V 9
supply current ICC 80 uA Tamb=-40℃ to +85℃; VI= VCC or GND; IO=0A; VCC=6.0V 9
nA to nY propagation delay tpd 125 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=2.0V 11
nA to nY propagation delay tpd 25 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=4.5V 11
nA to nY propagation delay tpd 21 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=6.0V 11
nOE to nY enable time ten 155 ns Tamb=-40℃ to +85℃; see Figure 6; VCC=2.0V 11
nOE to nY enable time ten 31 ns Tamb=-40℃ to +85℃; see Figure 6; VCC=4.5V 11
nOE to nY enable time ten 26 ns Tamb=-40℃ to +85℃; see Figure 6; VCC=6.0V 11
nOE to nY disable time tdis 155 ns Tamb=-40℃ to +85℃; see Figure 6; VCC=2.0V 11
nOE to nY disable time tdis 31 ns Tamb=-40℃ to +85℃; see Figure 6; VCC=4.5V 11
nOE to nY disable time tdis 26 ns Tamb=-40℃ to +85℃; see Figure 6; VCC=6.0V 11
transition time tt 75 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=2.0V 11
transition time tt 15 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=4.5V 11
transition time tt 13 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=6.0V 11
nA to nY propagation delay tpd 30 100 ns Tamb=25℃; see Figure 5; VCC=2.0V 10
nA to nY propagation delay tpd 11 20 ns Tamb=25℃; see Figure 5; VCC=4.5V 10
nA to nY propagation delay tpd 9 17 ns Tamb=25℃; see Figure 5; VCC=6.0V 10
nOE to nY enable time ten 41 125 ns Tamb=25℃; see Figure 6; VCC=2.0V 10
nOE to nY enable time ten 15 25 ns Tamb=25℃; see Figure 6; VCC=4.5V 10
nOE to nY enable time ten 12 21 ns Tamb=25℃; see Figure 6; VCC=6.0V 10
nOE to nY disable time tdis 41 125 ns Tamb=25℃; see Figure 6; VCC=2.0V 10
nOE to nY disable time tdis 15 25 ns Tamb=25℃; see Figure 6; VCC=4.5V 10
nOE to nY disable time tdis 12 21 ns Tamb=25℃; see Figure 6; VCC=6.0V 10
transition time tt 14 60 ns Tamb=25℃; see Figure 5; VCC=2.0V 10
transition time tt 5 12 ns Tamb=25℃; see Figure 5; VCC=4.5V 10
transition time tt 4 10 ns Tamb=25℃; see Figure 5; VCC=6.0V 10
input capacitance CI 3.5 pF Tamb=25℃ 8

CAD (KiCad official)

  • Symbol: Aip74HC125SA14.TR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: aip74hc125sa14-tr-etched.step / aip74hc125sa14-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aip74hc125sa14-tr.step / aip74hc125sa14-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I core Elec datasheet (17 pp, sha256 dca1b9bb780135ee, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF