main
Ray Publish 0.1.0 c3faa13 9d ago
{
  "slug": "aip74ahc1g08gb235-tr",
  "version": "0.1.0",
  "type": "component",
  "description": "Wuxi I-core Elec Gates, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic ics",
    "aip74ahc1g08gb235.tr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "aip74ahc1g08gb235-tr.kicad_sym",
    "aip74ahc1g08gb235-tr.kicad_mod",
    "aip74ahc1g08gb235-tr.glb",
    "aip74ahc1g08gb235-tr.step",
    "aip74ahc1g08gb235-tr.lbr",
    "docs/hero.png",
    "docs/aip74ahc1g08gb235-tr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "aip74ahc1g08gb235-tr-hero.glb",
    "aip74ahc1g08gb235-tr-hero.overlay.json",
    "aip74ahc1g08gb235-tr-etched.glb"
  ],
  "component": {
    "mpn": "AiP74AHC1G08GB235.TR",
    "manufacturer": "Wuxi I-core Elec",
    "package": "SOT-23-5",
    "pin_count": 5,
    "category": "Logic ICs",
    "subcategory": "Gates",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/d5049372faafde7e207cacbf8a5d4bf3.pdf",
    "parts": {
      "symbol": "aip74ahc1g08gb235-tr.kicad_sym",
      "footprint": "aip74ahc1g08gb235-tr.kicad_mod",
      "model_3d": "aip74ahc1g08gb235-tr-hero.glb",
      "model_3d_plain": "aip74ahc1g08gb235-tr-etched.glb",
      "model_3d_step": "aip74ahc1g08gb235-tr-etched.step",
      "model_3d_step_plain": "aip74ahc1g08gb235-tr.step",
      "lbr": "aip74ahc1g08gb235-tr.lbr"
    },
    "distributor_links": {
      "lcsc": "C5358060"
    },
    "distributor_check": {
      "checked_at": "2026-10-21T17:42:52Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "B",
        "type": "input",
        "description": "Data input B of the 2-input AND gate; for AiP74AHC1G08 the input uses CMOS input levels (VIH minimum 3.85 V at VCC=5.5V, VIL maximum 1.65 V at VCC=5.5V)."
      },
      {
        "number": "2",
        "name": "A",
        "type": "input",
        "description": "Data input A of the 2-input AND gate; for AiP74AHC1G08 the input uses CMOS input levels (VIH minimum 3.85 V at VCC=5.5V, VIL maximum 1.65 V at VCC=5.5V)."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V); the datasheet specifies GND as 0 V for all DC and AC test conditions."
      },
      {
        "number": "4",
        "name": "Y",
        "type": "output",
        "description": "Data output Y of the AND function (Y = A AND B); output voltage swings between 0 V and VCC, with a 0.5 V / 0.36 V / 0.44 V / 0.55 V VOL limit depending on temperature range and load."
      },
      {
        "number": "5",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage: 2.0 V to 5.5 V for AiP74AHC1G08 and 4.5 V to 5.5 V for AiP74AHCT1G08, with an absolute maximum of +7.0 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin arrangement drawing (page 3, section 2.2) is garbled in the text, so the pin-to-pad mapping "
        ],
        "pages_sent": 13,
        "cost_usd": 0.0245,
        "at": "2026-10-21T17:39:52"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/d5049372faafde7e207cacbf8a5d4bf3.pdf",
        "pages": 13,
        "sha256": "374e8c37f8c746f0",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 5,
        "described": 5,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "aip74ahc1g08gb235-tr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.8,
          2.9,
          1.55
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "720a6eab0024069bbee68e7cb4c3ff1149468a34611225cdc852662c5d0ec2b7",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "aip74ahc1g08gb235-tr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.8,
          2.9,
          1.55
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4e32239766b8eafe4edba4873610a6d0401cd0240050e098112d30d59db36d5b",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}